Lines Matching refs:domain
69 static PciBus *buses = NULL; /* indexed by pci_device.domain */
84 * buses we know exist, not all 256 which may exist in each domain.
98 pci_read(int domain, int bus, int dev, int func, uint32_t reg, uint32_t *val)
102 if ((domain < 0) || (domain >= nbuses))
105 if (pcibus_conf_read(buses[domain].fd, (unsigned int)bus,
115 pci_write(int domain, int bus, int dev, int func, uint32_t reg, uint32_t val)
118 if ((domain < 0) || (domain >= nbuses))
121 return pcibus_conf_write(buses[domain].fd, (unsigned int)bus,
126 pci_nfuncs(int domain, int bus, int dev)
130 if ((domain < 0) || (domain >= nbuses))
133 if (pci_read(domain, bus, dev, 0, PCI_BHLC_REG, &hdr) != 0)
155 buses[dev->domain].fd, (off_t)map->base);
219 if ((pcibus_conf_read(buses[dev->domain].fd,
252 if ((pcibus_conf_write(buses[dev->domain].fd,
292 if (busid.ubus.pci.domain != dev->domain)
325 int bus, dev, func, err, domain;
327 domain = device->domain;
333 err = pci_read(domain, bus, dev, func, PCI_COMMAND_STATUS_REG, ®);
342 err = pci_write(domain, bus, dev, func, PCI_COMMAND_STATUS_REG,
348 err = pci_read(domain, bus, dev, func, PCI_BHLC_REG, ®);
359 err = pci_read(domain, bus, dev, func, bar, ®);
364 err = pci_write(domain, bus, dev, func, bar, (unsigned int)~0);
367 pci_read(domain, bus, dev, func, bar, &size);
368 pci_write(domain, bus, dev, func, bar, reg);
391 err = pci_read(domain, bus, dev, func, bar, ®);
396 err = pci_write(domain, bus, dev, func, bar,
400 pci_read(domain, bus, dev, func, bar, &size);
401 pci_write(domain, bus, dev, func, bar,
416 err = pci_read(domain, bus, dev, func, PCI_MAPREG_ROM, ®);
420 err = pci_write(domain, bus, dev, func, PCI_MAPREG_ROM,
424 pci_read(domain, bus, dev, func, PCI_MAPREG_ROM, &size);
425 pci_write(domain, bus, dev, func, PCI_MAPREG_ROM, reg);
471 if ((pcibus_conf_read(buses[dev->domain].fd, (unsigned int)dev->bus,
476 if ((pcibus_conf_write(buses[dev->domain].fd,
482 if ((pcibus_conf_read(buses[dev->domain].fd, (unsigned int)dev->bus,
487 if ((pcibus_conf_write(buses[dev->domain].fd,
498 bios = mmap(NULL, rom_size, PROT_READ, MAP_SHARED, buses[dev->domain].fd,
511 if ((pcibus_conf_write(buses[dev->domain].fd,
518 if ((pcibus_conf_write(buses[dev->domain].fd,
945 int bus, dev, func, ndevs, nfuncs, domain, pcifd, n;
965 domain = n;
967 nfuncs = pci_nfuncs(domain, bus, dev);
969 if (pci_read(domain, bus, dev, func, PCI_ID_REG,
994 for (domain = 0; domain < nbuses; domain++) {
995 bus = buses[domain].num;
996 for (dev = 0; dev < buses[domain].maxdevs; dev++) {
997 nfuncs = pci_nfuncs(domain, bus, dev);
999 if (pci_read(domain, bus, dev, func,
1006 device->base.domain = domain;
1007 if (domain > 0xffff)
1010 device->base.domain_16 = domain & 0xffff;
1017 if (pci_read(domain, bus, dev, func,
1026 if (pci_read(domain, bus, dev, func,