1 /* $NetBSD: cycv_gmac.c,v 1.8 2026/06/22 20:26:34 jakllsch Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* Taken from sunxi_gmac.c */ 30 31 #include <sys/cdefs.h> 32 33 __KERNEL_RCSID(0, "$NetBSD: cycv_gmac.c,v 1.8 2026/06/22 20:26:34 jakllsch Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/systm.h> 40 #include <sys/gpio.h> 41 #include <sys/rndsource.h> 42 43 #include <net/if.h> 44 #include <net/if_ether.h> 45 #include <net/if_media.h> 46 47 #include <dev/mii/miivar.h> 48 49 #include <dev/ic/dwc_gmac_var.h> 50 #include <dev/ic/dwc_gmac_reg.h> 51 52 #include <dev/fdt/fdtvar.h> 53 #include <dev/fdt/dwc_gmac_fdt_subr.h> 54 55 static const struct device_compatible_entry compat_data[] = { 56 { .compat = "altr,socfpga-stmmac" }, 57 DEVICE_COMPAT_EOL 58 }; 59 60 static int 61 cycv_gmac_intr(void *arg) 62 { 63 return dwc_gmac_intr(arg); 64 } 65 66 static int 67 cycv_gmac_match(device_t parent, cfdata_t cf, void *aux) 68 { 69 struct fdt_attach_args * const faa = aux; 70 71 return of_compatible_match(faa->faa_phandle, compat_data); 72 } 73 74 static void 75 cycv_gmac_attach(device_t parent, device_t self, void *aux) 76 { 77 struct dwc_gmac_softc * const sc = device_private(self); 78 struct fdt_attach_args * const faa = aux; 79 const int phandle = faa->faa_phandle; 80 struct clk *clk_gmac; 81 struct fdtbus_reset *rst_gmac; 82 const char *phy_mode; 83 char intrstr[128]; 84 bus_addr_t addr; 85 bus_size_t size; 86 87 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 88 aprint_error(": couldn't get registers\n"); 89 return; 90 } 91 92 sc->sc_dev = self; 93 sc->sc_bst = faa->faa_bst; 94 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 95 aprint_error(": couldn't map registers\n"); 96 return; 97 } 98 sc->sc_dmat = faa->faa_dmat; 99 100 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof intrstr)) { 101 aprint_error(": failed to decode interrupt\n"); 102 return; 103 } 104 105 clk_gmac = fdtbus_clock_get(phandle, "stmmaceth"); 106 if (clk_gmac == NULL) { 107 aprint_error(": couldn't get clock\n"); 108 return; 109 } 110 111 rst_gmac = fdtbus_reset_get(phandle, "stmmaceth"); 112 if (rst_gmac == NULL) { 113 aprint_error(": couldn't get reset\n"); 114 return; 115 } 116 117 phy_mode = fdtbus_get_string(phandle, "phy-mode"); 118 if (phy_mode == NULL) { 119 aprint_error(": missing 'phy-mode' property\n"); 120 return; 121 } 122 123 if (clk_enable(clk_gmac) != 0) { 124 aprint_error(": couldn't enable clocks\n"); 125 return; 126 } 127 128 if (rst_gmac != NULL && fdtbus_reset_deassert(rst_gmac) != 0) { 129 aprint_error(": couldn't de-assert reset\n"); 130 return; 131 } 132 133 aprint_naive("\n"); 134 aprint_normal(": GMAC\n"); 135 136 if (fdtbus_intr_establish_xname(phandle, 0, IPL_NET, FDT_INTR_MPSAFE, 137 cycv_gmac_intr, sc, device_xname(sc->sc_dev)) == NULL) { 138 aprint_error_dev(self, "failed to establish interrupt on %s\n", 139 intrstr); 140 return; 141 } 142 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 143 144 dwc_gmac_preattach_fdt(phandle, sc); 145 146 dwc_gmac_attach(sc, MII_PHY_ANY, GMAC_MII_CLK_150_250M_DIV102); 147 } 148 149 CFATTACH_DECL_NEW(cycv_gmac, sizeof(struct dwc_gmac_softc), 150 cycv_gmac_match, cycv_gmac_attach, NULL, NULL); 151