1 /* $NetBSD: autoconf.c,v 1.4 2025/10/13 14:49:16 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas <matt (at) 3am-software.com>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.4 2025/10/13 14:49:16 thorpej Exp $"); 34 35 #include "opt_md.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/reboot.h> 40 #include <sys/disklabel.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/kernel.h> 44 45 #include <net/if.h> 46 #include <net/if_ether.h> 47 48 #include <machine/autoconf.h> 49 #include <machine/intr.h> 50 51 #include <evbarm/iyonix/iyonixvar.h> 52 53 #include <acorn32/include/bootconfig.h> 54 55 extern struct bootconfig bootconfig; 56 57 /* 58 * Set up the root device from the boot args 59 */ 60 void 61 cpu_rootconf(void) 62 { 63 aprint_normal("boot device: %s\n", 64 booted_device != NULL ? device_xname(booted_device) : "<unknown>"); 65 rootconf(); 66 } 67 68 69 /* 70 * void cpu_configure() 71 * 72 * Configure all the root devices 73 * The root devices are expected to configure their own children 74 */ 75 void 76 cpu_configure(void) 77 { 78 struct mainbus_attach_args maa; 79 80 (void) splhigh(); 81 (void) splserial(); /* XXX need an splextreme() */ 82 83 maa.ma_name = "mainbus"; 84 85 config_rootfound("mainbus", &maa); 86 87 /* Time to start taking interrupts so lets open the flood gates .... */ 88 spl0(); 89 } 90 91 #define BUILTIN_ETHERNET_P(pa) \ 92 ((pa)->pa_bus == 0 && (pa)->pa_device == 4 && (pa)->pa_function == 0) 93 94 #define SETPROP(x, y) \ 95 do { \ 96 if (prop_dictionary_set(device_properties(dev), \ 97 x, y) == false) { \ 98 printf("WARNING: unable to set " x " " \ 99 "property for %s\n", device_xname(dev)); \ 100 } \ 101 prop_object_release(y); \ 102 } while (/*CONSTCOND*/0) 103 104 void 105 device_register(device_t dev, void *aux) 106 { 107 device_t pdev; 108 109 if ((pdev = device_parent(dev)) != NULL && 110 device_is_a(pdev, "pci")) { 111 struct pci_attach_args *pa = aux; 112 113 if (BUILTIN_ETHERNET_P(pa)) { 114 prop_number_t cfg1, cfg2, swdpin; 115 116 /* 117 * We set these configuration registers to 0, 118 * because it's the closest we have to "leave them 119 * alone". That and, it works. 120 */ 121 cfg1 = prop_number_create_integer(0); 122 KASSERT(cfg1 != NULL); 123 cfg2 = prop_number_create_integer(0); 124 KASSERT(cfg2 != NULL); 125 swdpin = prop_number_create_integer(0); 126 KASSERT(swdpin != NULL); 127 128 device_setprop_data(dev, "mac-address", 129 iyonix_macaddr, ETHER_ADDR_LEN); 130 131 SETPROP("i82543-cfg1", cfg1); 132 SETPROP("i82543-cfg2", cfg2); 133 SETPROP("i82543-swdpin", swdpin); 134 } 135 } 136 137 if ((device_is_a(dev, "genfb") || device_is_a(dev, "gffb")) && 138 device_is_a(device_parent(dev), "pci") ) { 139 prop_dictionary_t dict = device_properties(dev); 140 struct pci_attach_args *pa = aux; 141 pcireg_t bar0, bar1; 142 uint32_t fbaddr; 143 bus_space_handle_t vgah; 144 145 bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START); 146 bar1 = pci_conf_read(pa->pa_pc, pa->pa_tag, 147 PCI_MAPREG_START + 0x04); 148 149 /* 150 * We need to prod the VGA card to disable interrupts, since 151 * RISC OS has been using them and we don't know how to 152 * handle them. This assumes that we have a NVidia 153 * GeForce 2 MX card as supplied with the Iyonix and 154 * as (probably) required by RISC OS in order to boot. 155 * If you write your own RISC OS driver for a different card, 156 * you're on your own. 157 */ 158 159 /* We're guessing at the numbers here, guys */ 160 #define VGASIZE 0x1000 161 #define IRQENABLE_ADDR 0x140 162 163 bus_space_map(pa->pa_memt, PCI_MAPREG_MEM_ADDR(bar0), 164 VGASIZE, 0, &vgah); 165 bus_space_write_4(pa->pa_memt, vgah, 0x140, 0); 166 bus_space_unmap(pa->pa_memt, vgah, 0x1000); 167 168 fbaddr = PCI_MAPREG_MEM_ADDR(bar1); 169 170 device_setprop_bool(dev, "is_console", true); 171 prop_dictionary_set_uint32(dict, "width", 172 bootconfig.width + 1); 173 prop_dictionary_set_uint32(dict, "height", 174 bootconfig.height + 1); 175 prop_dictionary_set_uint32(dict, "depth", 176 1 << bootconfig.log2_bpp); 177 /* 178 * XXX 179 * at least RISC OS 5.28 seems to use the graphics hardware in 180 * BGR mode when in 32bit colour, so take that into account 181 */ 182 if (bootconfig.log2_bpp == 5) 183 prop_dictionary_set_bool(dict, "is_bgr", 1); 184 prop_dictionary_set_uint32(dict, "address", fbaddr); 185 } 186 if (device_is_a(dev, "dsrtc")) { 187 /* RISC OS RTC epoch is 2000. */ 188 device_setprop_uint(dev, "start-year", 2000); 189 } 190 } 191
Indexes created Sun Oct 25 00:26:45 UTC 2026