Lines Matching defs:astReg
1361 ASTRegPtr astReg;
1366 astReg = &pAST->SavedReg;
1373 astReg->GFX[i] = ulData;
1382 astReg->MISC = GetReg(MISC_PORT_READ);
1386 GetIndexReg(SEQ_PORT, (UCHAR) (i), astReg->SEQ[i]);
1390 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->CRTC[i]);
1394 GetIndexReg(GR_PORT, (UCHAR) (i), astReg->GR[i]);
1399 GetIndexReg(AR_PORT_WRITE, (UCHAR) (i), astReg->AR[i]);
1420 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1422 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1423 GetIndexReg(CRTC_PORT, (UCHAR) (0xBB), astReg->ExtCRTC[icount]);
1427 VGA_GET_PALETTE_INDEX (i, astReg->DAC[i][0], astReg->DAC[i][1], astReg->DAC[i][2]);
1430 astReg->ENG8044 = 0;
1431 GetIndexReg(CRTC_PORT, 0xA4, astReg->REGA4);
1432 if (astReg->REGA4 & 0x01) /* 2D enabled */
1433 astReg->ENG8044 = *(ULONG *) (pAST->MMIOVirtualAddr + 0x8044);
1442 ASTRegPtr astReg;
1447 astReg = &pAST->SavedReg;
1455 ulData = astReg->GFX[i];
1465 SetReg(MISC_PORT_WRITE, astReg->MISC);
1469 SetIndexReg(SEQ_PORT, (UCHAR) (i), astReg->SEQ[i]);
1474 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->CRTC[i]);
1478 SetIndexReg(GR_PORT, (UCHAR) (i), astReg->GR[i]);
1485 SetReg(AR_PORT_WRITE, astReg->AR[i]);
1510 VGA_LOAD_PALETTE_INDEX (i, astReg->DAC[i][0], astReg->DAC[i][1], astReg->DAC[i][2]);
1514 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1516 SetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1517 SetIndexReg(CRTC_PORT, (UCHAR) (0xBB), astReg->ExtCRTC[icount]);