Lines Matching refs:SetIndexRegMask
737 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00);
784 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x00);
789 SetIndexRegMask(CRTC_PORT,0x00, 0x00, (UCHAR) usTemp);
792 SetIndexRegMask(CRTC_PORT,0x01, 0x00, (UCHAR) usTemp);
795 SetIndexRegMask(CRTC_PORT,0x02, 0x00, (UCHAR) usTemp);
799 SetIndexRegMask(CRTC_PORT,0x03, 0xE0, (UCHAR) (usTemp & 0x1F));
802 SetIndexRegMask(CRTC_PORT,0x04, 0x00, (UCHAR) (usTemp));
805 SetIndexRegMask(CRTC_PORT,0x05, 0x60, (UCHAR) ((usTemp & 0x1F) | jReg05));
807 SetIndexRegMask(CRTC_PORT,0xAC, 0x00, (UCHAR) jRegAC);
808 SetIndexRegMask(CRTC_PORT,0xAD, 0x00, (UCHAR) jRegAD);
815 SetIndexRegMask(CRTC_PORT,0x06, 0x00, (UCHAR) usTemp);
820 SetIndexRegMask(CRTC_PORT,0x10, 0x00, (UCHAR) usTemp);
824 SetIndexRegMask(CRTC_PORT,0x11, 0x70, (UCHAR) (usTemp & 0x0F));
829 SetIndexRegMask(CRTC_PORT,0x12, 0x00, (UCHAR) usTemp);
834 SetIndexRegMask(CRTC_PORT,0x15, 0x00, (UCHAR) usTemp);
837 SetIndexRegMask(CRTC_PORT,0x16, 0x00, (UCHAR) usTemp);
839 SetIndexRegMask(CRTC_PORT,0x07, 0x00, (UCHAR) jReg07);
840 SetIndexRegMask(CRTC_PORT,0x09, 0xDF, (UCHAR) jReg09);
841 SetIndexRegMask(CRTC_PORT,0xAE, 0x00, (UCHAR) (jRegAE | 0x80)); /* disable line compare */
845 SetIndexRegMask(CRTC_PORT,0xB6, 0x3F, 0x80);
849 SetIndexRegMask(CRTC_PORT,0xB6, 0x3F, 0x00);
853 SetIndexRegMask(CRTC_PORT,0x11, 0x7F, 0x80);
889 SetIndexRegMask(CRTC_PORT,0xC0, 0x00, pDCLKPtr->Param1);
890 SetIndexRegMask(CRTC_PORT,0xC1, 0x00, pDCLKPtr->Param2);
893 SetIndexRegMask(CRTC_PORT,0xBB, 0x0F, (pDCLKPtr->Param3 & 0xF0));
897 SetIndexRegMask(CRTC_PORT,0xBB, 0x0F, (pDCLKPtr->Param3 & 0xC0) | ((pDCLKPtr->Param3 & 0x03) << 4) );
931 SetIndexRegMask(CRTC_PORT,0xA0, 0x8F, (UCHAR) jRegA0);
932 SetIndexRegMask(CRTC_PORT,0xA3, 0xF0, (UCHAR) jRegA3);
933 SetIndexRegMask(CRTC_PORT,0xA8, 0xFD, (UCHAR) jRegA8);
939 SetIndexRegMask(CRTC_PORT,0xA2, 0x3F, (UCHAR) jRegA2);