Lines Matching refs:UCHAR
58 __inline ULONG MIndwm(UCHAR *mmiobase, ULONG r)
73 __inline void MOutdwm(UCHAR *mmiobase, ULONG r, ULONG v)
96 UCHAR *mmiobase;
105 UCHAR SendACK;
115 UCHAR SendACK;
125 UCHAR WaitACK;
143 UCHAR WaitACK;
172 static Bool write_cmd(ScrnInfoPtr pScrn, UCHAR data)
175 UCHAR retry = 0;
198 static Bool write_data(ScrnInfoPtr pScrn, UCHAR data)
218 static void SetDP501VideoOutput(ScrnInfoPtr pScrn, UCHAR Mode)
227 static BOOL BackupM68KFW(ScrnInfoPtr pScrn, UCHAR *addr, ULONG size)
230 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
252 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
255 UCHAR *pFWAddr;
256 UCHAR jReg;
333 UCHAR *mmiobase;
363 UCHAR ASTGetLinkMaxCLK(ScrnInfoPtr pScrn)
366 UCHAR *mmiobase;
368 UCHAR LinkCap[4], LinkRate, LinkLanes, MaxClk = 0xFF;
389 MaxClk = (UCHAR)(Data);
539 UCHAR jReg;
584 UCHAR jReg;
674 UCHAR jReg;
698 pAST->pDP501FWBufferVirtualAddress = (UCHAR*) calloc(1, 32*1024);
758 SetIndexReg(CRTC_PORT,0x0D, (UCHAR) (addr & 0xFF));
759 SetIndexReg(CRTC_PORT,0x0C, (UCHAR) ((addr >> 8) & 0xFF));
760 SetIndexReg(CRTC_PORT,0xAF, (UCHAR) ((addr >> 16) & 0xFF));
822 UCHAR DACIndex, DACR, DACG, DACB;
884 UCHAR SEQ01, CRB6;
960 UCHAR *pjEDID;
962 UCHAR *offset;
1032 *(UCHAR *) (pjEDID++) = (UCHAR) ((*(ULONG *) (offset + 0x20) & 0xFF00) >> 8);
1043 *(UCHAR *) (pjEDID++) = (UCHAR) ((*(ULONG *) (offset + 0x20) & 0xFF00) >> 8);
1062 UCHAR ch;
1101 static UCHAR ExtRegInfo[] = {
1108 static UCHAR ExtRegInfo_AST2300A0[] = {
1115 static UCHAR ExtRegInfo_AST2300[] = {
1125 UCHAR i, jIndex, jReg, *pjExtRegInfo;
1147 while (*(UCHAR *) (pjExtRegInfo) != 0xFF)
1149 SetIndexRegMask(CRTC_PORT,jIndex, 0x00, *(UCHAR *) (pjExtRegInfo));
1214 UCHAR *pjMMIOVirtualAddress;
1220 UCHAR *mmiobase;
1252 UCHAR *mmiobase;
1273 UCHAR *mmiobase;
1292 UCHAR *mmiobase;
1314 UCHAR *mmiobase;
1493 UCHAR jReg;
1608 UCHAR *pjMMIOVirtualAddress;
1661 UCHAR *mmiobase;
1685 UCHAR *mmiobase;
1708 UCHAR *mmiobase;
1732 UCHAR *mmiobase;
1755 UCHAR *mmiobase;
1777 UCHAR *mmiobase;
1803 UCHAR *mmiobase;
1815 UCHAR *mmiobase;
1848 UCHAR *mmiobase;
1869 UCHAR *mmiobase;
1979 UCHAR *mmiobase;
2077 UCHAR *mmiobase;
2138 UCHAR *mmiobase;
2386 UCHAR *mmiobase;
2630 UCHAR *mmiobase;
2760 UCHAR *mmiobase;
2888 UCHAR jReg;
3006 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3029 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3052 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3064 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3090 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3128 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3161 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3176 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3202 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3248 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3357 UCHAR *mmiobase = pAST->MMIOVirtualAddr;
3379 UCHAR jReg;
3457 UCHAR jReg;
3525 UCHAR jReg;
3598 I2CWriteClock(ASTRecPtr pAST, UCHAR data)
3600 UCHAR ujCRB7, jtemp;
3614 I2CWriteData(ASTRecPtr pAST, UCHAR data)
3616 UCHAR volatile ujCRB7, jtemp;
3632 UCHAR volatile ujCRB7;
3643 UCHAR volatile ujCRB7;
3657 UCHAR jtemp;
3698 UCHAR Data;
3706 Data = (UCHAR) I2CReadData(pAST); /* Set Data High */
3740 SendI2CDataByte(ASTRecPtr pAST, UCHAR data)
3742 UCHAR jData;
3759 UCHAR
3762 UCHAR jData=0, jTempData;
3788 return ((UCHAR)jData);
3795 UCHAR *pjDstEDID;
3796 UCHAR jData;
3800 pjDstEDID = (UCHAR *) pEDIDBuffer;
3956 UCHAR jReg;