Lines Matching refs:ULONG
58 __inline ULONG MIndwm(UCHAR *mmiobase, ULONG r)
60 ULONG ulData;
62 *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000;
63 *(ULONG *) (mmiobase + 0xF000) = 0x1;
66 ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000;
69 return ( *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) );
73 __inline void MOutdwm(UCHAR *mmiobase, ULONG r, ULONG v)
75 ULONG ulData;
77 *(ULONG *) (mmiobase + 0xF004) = r & 0xFFFF0000;
78 *(ULONG *) (mmiobase + 0xF000) = 0x1;
81 ulData = *(volatile ULONG *) (mmiobase + 0xF004) & 0xFFFF0000;
84 *(volatile ULONG *) (mmiobase + 0x10000 + (r & 0x0000FFFF)) = v;
93 static ULONG GetFWBase(ScrnInfoPtr pScrn)
126 ULONG retry=0;
144 ULONG retry=0;
227 static BOOL BackupM68KFW(ScrnInfoPtr pScrn, UCHAR *addr, ULONG size)
231 ULONG i, Data;
232 ULONG BootAddress;
241 *(ULONG *)(addr + i) = MIndwm(mmiobase, BootAddress + i);
253 ULONG i, Data, Len;
254 ULONG BootAddress;
302 Data = *(ULONG *)(pFWAddr + i);
334 ULONG i, BootAddress, Offset, Data;
357 *(ULONG *)(pEDIDData + i) = Data;
367 ULONG BootAddress, Offset, Data;
382 *(ULONG *)(LinkCap) = MIndwm(mmiobase, BootAddress + Offset);
429 ULONG ulRefPLL, ulDeNumerator, ulNumerator, ulDivider;
430 ULONG ulData, ulData2;
432 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
433 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
441 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000) = 0xFC600309;
443 if (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10000) == 0x01)
456 ulData = *(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10004);
507 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x10120);
508 ulData2 = *(ULONG *) (pAST->MMIOVirtualAddr + 0x10170);
534 ULONG
538 ULONG ulVRAMSize;
580 ULONG
585 ULONG ulDRAMBusWidth, ulMCLK, ulDRAMBandwidth, ActualDRAMBandwidth, DRAMEfficiency = 500;
586 ULONG ulDCLK;
641 ULONG ulData;
645 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
646 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
647 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1207c);
673 ULONG ulData;
731 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
732 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
733 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1207c);
745 vASTSetStartAddressCRT1(ASTRecPtr pAST, ULONG base)
747 ULONG addr;
769 ULONG ulData;
791 ULONG ulData;
885 ULONG ulData, ulTemp;
959 ULONG i, ulData;
961 ULONG base, deviceaddr;
979 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
980 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
983 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
984 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12004);
986 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12004) = ulData;
991 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = base;
992 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
996 *(ULONG *) (offset + 0x00) = 0x0;
997 *(ULONG *) (offset + 0x04) = 0x77777355;
998 *(ULONG *) (offset + 0x08) = 0x0;
999 *(ULONG *) (offset + 0x10) = 0xffffffff;
1000 *(ULONG *) (offset + 0x00) = 0x1;
1001 *(ULONG *) (offset + 0x0C) = 0xAF;
1002 *(ULONG *) (offset + 0x20) = deviceaddr;
1003 *(ULONG *) (offset + 0x14) = 0x03;
1005 ulData = *(volatile ULONG *) (offset + 0x10);
1009 *(ULONG *) (offset + 0x10) = 0xffffffff;
1010 *(ULONG *) (offset + 0x20) = (ULONG) 0; /* Offset */
1011 *(ULONG *) (offset + 0x14) = 0x02;
1013 ulData = *(volatile ULONG *) (offset + 0x10);
1015 *(ULONG *) (offset + 0x10) = 0xffffffff;
1016 *(ULONG *) (offset + 0x20) = deviceaddr + 1;
1017 *(ULONG *) (offset + 0x14) = 0x03;
1019 ulData = *(volatile ULONG *) (offset + 0x10);
1025 *(ULONG *) (offset + 0x10) = 0xffffffff;
1026 *(ULONG *) (offset + 0x0C) |= 0x10;
1027 *(ULONG *) (offset + 0x14) = 0x08;
1029 ulData = *(volatile ULONG *) (offset + 0x10);
1031 *(ULONG *) (offset + 0x10) = 0xffffffff;
1032 *(UCHAR *) (pjEDID++) = (UCHAR) ((*(ULONG *) (offset + 0x20) & 0xFF00) >> 8);
1036 *(ULONG *) (offset + 0x10) = 0xffffffff;
1037 *(ULONG *) (offset + 0x0C) |= 0x10;
1038 *(ULONG *) (offset + 0x14) = 0x18;
1040 ulData = *(volatile ULONG *) (offset + 0x10);
1042 *(ULONG *) (offset + 0x10) = 0xffffffff;
1043 *(UCHAR *) (pjEDID++) = (UCHAR) ((*(ULONG *) (offset + 0x20) & 0xFF00) >> 8);
1046 *(ULONG *) (offset + 0x10) = 0xffffffff;
1047 *(ULONG *) (offset + 0x14) = 0x20;
1049 ulData = *(volatile ULONG *) (offset + 0x10);
1051 *(ULONG *) (offset + 0x0C) &= 0xffffffef;
1052 *(ULONG *) (offset + 0x10) = 0xffffffff;
1063 ULONG ulData;
1197 static ULONG pattern_AST2150[14] ={
1217 static ULONG MMCTestBurst2_AST2150(PAST2150DRAMParam param, ULONG datagen)
1219 ULONG data, timeout;
1249 static ULONG MMCTestSingle2_AST2150(PAST2150DRAMParam param, ULONG datagen)
1251 ULONG data, timeout;
1291 ULONG patcnt, loop;
1313 ULONG dllmin[4], dllmax[4], dlli, data, passcnt;
1350 ULONG Data;
1492 ULONG i, ulTemp, ulData;
1504 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
1505 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
1506 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10100) = 0xa8;
1510 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10100) != 0xa8);
1520 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
1521 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
1523 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
1526 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x12000) != 0x01);
1528 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000) = 0xFC600309;
1531 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10000) != 0x01);
1551 ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12070);
1554 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000 + pjDRAMRegInfo->Index) = (ulData | ulTemp);
1558 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000 + pjDRAMRegInfo->Index) = pjDRAMRegInfo->Data;
1564 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x10120);
1568 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x10004);
1578 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10140) |= 0x40;
1585 ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1200c);
1586 *(ULONG *) (pAST->MMIOVirtualAddr + 0x1200c) = (ulTemp & 0xFFFFFFFD);
1588 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12040) |= 0x40;
1609 ULONG DRAM_Type;
1610 ULONG DRAM_ChipID;
1611 ULONG DRAM_Freq;
1612 ULONG VRAM_Size;
1613 ULONG ODT; /* 0/75/150 */
1614 ULONG WODT; /* 0/40/60/120 */
1615 ULONG RODT;
1617 ULONG DRAM_CONFIG;
1618 ULONG REG_PERIOD;
1619 ULONG REG_MADJ;
1620 ULONG REG_SADJ;
1621 ULONG REG_MRS;
1622 ULONG REG_EMRS;
1623 ULONG REG_AC1;
1624 ULONG REG_AC2;
1625 ULONG REG_DQSIC;
1626 ULONG REG_DRV;
1627 ULONG REG_IOZ;
1628 ULONG REG_DQIDLY;
1629 ULONG REG_FREQ;
1630 ULONG MADJ_MAX;
1631 ULONG DLL2_FINETUNE_STEP;
1648 ULONG pattern[8] ={
1658 static int MMCTestBurst(PAST2300DRAMParam param, ULONG datagen)
1660 ULONG data, timeout;
1682 static int MMCTestBurst2(PAST2300DRAMParam param, ULONG datagen)
1684 ULONG data, timeout;
1705 static int MMCTestSingle(PAST2300DRAMParam param, ULONG datagen)
1707 ULONG data, timeout;
1729 static int MMCTestSingle2(PAST2300DRAMParam param, ULONG datagen)
1731 ULONG data, timeout;
1754 ULONG data;
1776 ULONG data, data2, patcnt, loop;
1800 static ULONG CBRTest2(PAST2300DRAMParam param)
1802 ULONG data;
1812 static ULONG CBRScan2(PAST2300DRAMParam param)
1814 ULONG data, data2, patcnt, loop;
1838 static ULONG CBRTest3(PAST2300DRAMParam param)
1845 static ULONG CBRScan3(PAST2300DRAMParam param)
1847 ULONG patcnt, loop;
1868 ULONG gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, retry = 0;
1974 ULONG dlli, dqsip, dqidly, cnt;
1975 ULONG reg_mcr18, reg_mcr0c, passcnt[2], diff;
1976 ULONG g_dqidly, g_dqsip, g_margin, g_side;
2076 ULONG dllmin[2], dllmax[2], dlli, data, data2, passcnt, retry=0;
2139 ULONG trap, TRAP_AC2, TRAP_MRS;
2387 ULONG trap, TRAP_AC2, TRAP_MRS;
2629 ULONG data, data2, retry = 0;
2759 ULONG data, data2, retry = 0;
2887 ULONG i, ulTemp;
2894 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
2895 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
2897 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
2900 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x12000) != 0x01);
2902 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000) = 0xFC600309;
2905 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10000) != 0x01);
2908 ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008);
2910 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008) = ulTemp;
2917 param.DRAM_ChipID = (ULONG) pAST->jDRAMType;
2965 ULONG ddr3_1600_timing_table[REGTBL_NUM] = {
2984 ULONG ddr4_1600_timing_table[REGTBL_NUM] = {
3003 static int MMCTestBurst_AST2500(ScrnInfoPtr pScrn, ULONG datagen)
3007 ULONG data, timecnt;
3026 static int MMCTestSingle_AST2500(ScrnInfoPtr pScrn, ULONG datagen)
3030 ULONG data, timecnt;
3049 static ULONG CBRTest_AST2500(ScrnInfoPtr pScrn)
3091 ULONG data, pass, timecnt;
3125 static void Check_DRAM_Size(ScrnInfoPtr pScrn, ULONG tRFC)
3129 ULONG reg_04, reg_14;
3162 ULONG reg_04, data;
3177 ULONG addr, data, param;
3199 static void DDR3_Init_AST2500(ScrnInfoPtr pScrn, ULONG *ddr_table)
3245 static void DDR4_Init_AST2500(ScrnInfoPtr pScrn, ULONG *ddr_table)
3249 ULONG data, data2, pass;
3250 ULONG ddr_vref, phy_vref;
3251 ULONG min_ddr_vref, min_phy_vref;
3252 ULONG max_ddr_vref, max_phy_vref;
3358 ULONG data;
3378 ULONG ulTemp;
3385 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
3386 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
3388 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
3391 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x12000) != 0x01);
3393 *(ULONG *) (pAST->MMIOVirtualAddr + 0x10000) = 0xFC600309;
3396 } while (*(volatile ULONG *) (pAST->MMIOVirtualAddr + 0x10000) != 0x01);
3399 ulTemp = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008);
3401 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008) = ulTemp;
3419 ULONG ulData;
3423 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
3424 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
3425 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12070);
3456 ULONG ulData;
3459 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF004) = 0x1e6e0000;
3460 *(ULONG *) (pAST->MMIOVirtualAddr + 0xF000) = 0x1;
3461 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
3466 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008); /* delay phase */
3469 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12008) = ulData;
3473 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12084); /* multi-pins for DVO single-edge */
3475 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12084) = ulData;
3477 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088); /* multi-pins for DVO single-edge */
3479 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088) = ulData;
3481 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12090); /* multi-pins for DVO single-edge */
3484 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12090) = ulData;
3488 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088); /* multi-pins for DVO single-edge */
3490 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12088) = ulData;
3492 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1208c); /* multi-pins for DVO single-edge */
3494 *(ULONG *) (pAST->MMIOVirtualAddr + 0x1208c) = ulData;
3496 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a4); /* multi-pins for DVO single-edge */
3498 *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a4) = ulData;
3500 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a8); /* multi-pins for DVO single-edge */
3502 *(ULONG *) (pAST->MMIOVirtualAddr + 0x120a8) = ulData;
3504 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x12094); /* multi-pins for DVO single-edge */
3506 *(ULONG *) (pAST->MMIOVirtualAddr + 0x12094) = ulData;
3511 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c);
3513 *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c) = ulData;
3524 ULONG ulData;
3546 *(ULONG *)(pAST->MMIOVirtualAddr + 0x12000) = 0x1688A8A8;
3547 ulData = *(ULONG *) (pAST->MMIOVirtualAddr + 0x1202c);
3549 *(ULONG *)(pAST->MMIOVirtualAddr) = ulData;
3560 Bool ASTInitVGA(ScrnInfoPtr pScrn, ULONG Flags)
3601 ULONG i;
3617 ULONG i;
3656 ULONG i;
3797 ULONG i;
3900 ULONG ulData;