Lines Matching defs:src_obj
69 struct r600_accel_object src_obj, dst_obj;
149 src_obj.pitch = pPriv->src_pitch;
150 src_obj.width = pPriv->w;
151 src_obj.height = pPriv->h;
152 src_obj.bpp = 16;
153 src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT;
154 src_obj.bo = pPriv->src_bo[pPriv->currentBuffer];
155 src_obj.tiling_flags = 0;
156 src_obj.surface = NULL;
164 &src_obj,
223 accel_state->src_size[0] = accel_state->src_obj[0].pitch * pPriv->h;
227 tex_res.w = accel_state->src_obj[0].width;
228 tex_res.h = accel_state->src_obj[0].height;
229 tex_res.pitch = accel_state->src_obj[0].pitch;
235 tex_res.bo = accel_state->src_obj[0].bo;
236 tex_res.mip_bo = accel_state->src_obj[0].bo;
249 if ((accel_state->src_obj[0].tiling_flags & RADEON_TILING_MASK) ==
252 evergreen_set_tex_resource(pScrn, &tex_res, accel_state->src_obj[0].domain);
271 tex_res.w = accel_state->src_obj[0].width >> 1;
272 tex_res.h = accel_state->src_obj[0].height >> 1;
273 tex_res.pitch = RADEON_ALIGN(accel_state->src_obj[0].pitch >> 1, pPriv->hw_align);
283 if ((accel_state->src_obj[0].tiling_flags & RADEON_TILING_MASK) ==
286 evergreen_set_tex_resource(pScrn, &tex_res, accel_state->src_obj[0].domain);
295 tex_res.w = accel_state->src_obj[0].width >> 1;
296 tex_res.h = accel_state->src_obj[0].height >> 1;
297 tex_res.pitch = RADEON_ALIGN(accel_state->src_obj[0].pitch >> 1, pPriv->hw_align);
307 if ((accel_state->src_obj[0].tiling_flags & RADEON_TILING_MASK) ==
310 evergreen_set_tex_resource(pScrn, &tex_res, accel_state->src_obj[0].domain);
319 accel_state->src_size[0] = accel_state->src_obj[0].pitch * pPriv->h;
323 tex_res.w = accel_state->src_obj[0].width;
324 tex_res.h = accel_state->src_obj[0].height;
325 tex_res.pitch = accel_state->src_obj[0].pitch >> 1;
331 tex_res.bo = accel_state->src_obj[0].bo;
332 tex_res.mip_bo = accel_state->src_obj[0].bo;
348 if ((accel_state->src_obj[0].tiling_flags & RADEON_TILING_MASK) ==
351 evergreen_set_tex_resource(pScrn, &tex_res, accel_state->src_obj[0].domain);