Cross Reference: /xsrc/external/mit/xf86-video-ati/dist/src/atombios

Lines Matching defs:link_status
2409 static uint8_t dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], int r)
2411     return link_status[r - DP_LANE0_1_STATUS];
2414 static uint8_t dp_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane)
2418     uint8_t l = dp_link_status(link_status, i);
2422 static Bool dp_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
2429 	lane_status = dp_get_lane_status(link_status, lane);
2442 dp_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
2448     lane_align = dp_link_status(link_status,
2453 	lane_status = dp_get_lane_status(link_status, lane);
2466 			  uint8_t link_status[DP_LINK_STATUS_SIZE])
2471 				  DP_LINK_STATUS_SIZE, link_status);
2476 /*    ErrorF("link status %02x %02x %02x %02x %02x %02x\n", link_status[0], link_status[1],
2477 	   link_status[2], link_status[3], link_status[4], link_status[5]); */
2483 dp_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
2491     uint8_t l = dp_link_status(link_status, i);
2497 dp_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
2504     uint8_t l = dp_link_status(link_status, i);
2554 		      uint8_t link_status[DP_LINK_STATUS_SIZE],
2564 	uint8_t this_v = dp_get_adjust_request_voltage(link_status, lane);
2565 	uint8_t this_p = dp_get_adjust_request_pre_emphasis(link_status, lane);
2642     uint8_t link_status[DP_LINK_STATUS_SIZE];
2698 	if (!atom_dp_get_link_status(output, link_status))
2701 	if (dp_clock_recovery_ok(link_status, radeon_output->dp_lane_count)) {
2728         dp_get_adjust_train(output, link_status, radeon_output->dp_lane_count, train_set);
2748 	if (!atom_dp_get_link_status(output, link_status))
2751 	if (dp_channel_eq_ok(link_status, radeon_output->dp_lane_count)) {
2764         dp_get_adjust_train(output, link_status, radeon_output->dp_lane_count, train_set);