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Lines Matching refs:fp_gen_cntl

293     OUTREG(RADEON_FP_GEN_CNTL,          restore->fp_gen_cntl);
385     save->fp_gen_cntl          = INREG(RADEON_FP_GEN_CNTL);
932 	    save->fp_gen_cntl |= (RADEON_FP_FPON | RADEON_FP_TMDS_EN);
1042 		save->fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
1154     save->fp_gen_cntl = info->SavedReg->fp_gen_cntl |
1158     save->fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
1160     save->fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN |
1169 	save->fp_gen_cntl |= RADEON_FP_PANEL_FORMAT;  /* 24 bit format */
1171 	save->fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */
1175 	    save->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
1177 		save->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;
1179 		save->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
1181 	    save->fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2;
1184 	    save->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
1185 	    save->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC2;
1187 	    save->fp_gen_cntl |= RADEON_FP_SEL_CRTC2;