Lines Matching refs:RADEON_BIOS8
414 if ((RADEON_BIOS8(tmp) == 'A' &&
415 RADEON_BIOS8(tmp+1) == 'T' &&
416 RADEON_BIOS8(tmp+2) == 'O' &&
417 RADEON_BIOS8(tmp+3) == 'M') ||
418 (RADEON_BIOS8(tmp) == 'M' &&
419 RADEON_BIOS8(tmp+1) == 'O' &&
420 RADEON_BIOS8(tmp+2) == 'T' &&
421 RADEON_BIOS8(tmp+3) == 'A'))
799 tmp1 = RADEON_BIOS8(tmp0+2) & 0x07;
856 if (RADEON_BIOS8(offset + 6) == 'T') {
902 if (RADEON_BIOS8(offset + 6) == 'T') {
903 switch (RADEON_BIOS8(offset + 7) & 0xf) {
935 refclk = (RADEON_BIOS8(offset + 9) >> 2) & 0x3;
947 stds = RADEON_BIOS8(offset + 10) & 0x1f;
999 rev = RADEON_BIOS8(pll_info_block);
1051 rev = RADEON_BIOS8(offset + 0x3);
1053 bg = RADEON_BIOS8(offset + 0xc) & 0xf;
1054 dac = RADEON_BIOS8(offset + 0xd) & 0xf;
1057 bg = RADEON_BIOS8(offset + 0xe) & 0xf;
1058 dac = RADEON_BIOS8(offset + 0xf) & 0xf;
1061 bg = RADEON_BIOS8(offset + 0x10) & 0xf;
1062 dac = RADEON_BIOS8(offset + 0x11) & 0xf;
1067 bg = RADEON_BIOS8(offset + 0xc) & 0xf;
1068 dac = (RADEON_BIOS8(offset + 0xc) >> 4) & 0xf;
1071 bg = RADEON_BIOS8(offset + 0xd) & 0xf;
1072 dac = (RADEON_BIOS8(offset + 0xd) >> 4) & 0xf;
1075 bg = RADEON_BIOS8(offset + 0xe) & 0xf;
1076 dac = (RADEON_BIOS8(offset + 0xe) >> 4) & 0xf;
1085 rev = RADEON_BIOS8(offset) & 0x3;
1087 bg = RADEON_BIOS8(offset + 0x3) & 0xf;
1088 dac = (RADEON_BIOS8(offset + 0x3) >> 4) & 0xf;
1095 bg = RADEON_BIOS8(offset + 0x4) & 0xf;
1096 dac = RADEON_BIOS8(offset + 0x5) & 0xf;
1131 stmp[i] = RADEON_BIOS8(tmp+i+1);
1149 info->PostDivider = RADEON_BIOS8(tmp+48);
1171 native_mode->HSyncWidth = RADEON_BIOS8(tmp0+23) * 8;
1236 tmds->tmds_pll[i].value = ((RADEON_BIOS8(tmp+i*6+8) & 0x3f) |
1237 ((RADEON_BIOS8(tmp+i*6+10) & 0x3f)<<6) |
1238 ((RADEON_BIOS8(tmp+i*6+9) & 0xf)<<12) |
1239 ((RADEON_BIOS8(tmp+i*6+11) & 0xf)<<16));
1257 "DFP table revision: %d\n", RADEON_BIOS8(tmp));
1258 if (RADEON_BIOS8(tmp) == 3) {
1259 n = RADEON_BIOS8(tmp + 5) + 1;
1266 } else if (RADEON_BIOS8(tmp) == 4) {
1268 n = RADEON_BIOS8(tmp + 5) + 1;
1295 blocks = RADEON_BIOS8(offset + 2);
1297 int i2c_id = RADEON_BIOS8(offset + 3 + (i * 5) + 0);
1299 int clock_shift = RADEON_BIOS8(offset + 3 + (i * 5) + 3);
1300 int data_shift = RADEON_BIOS8(offset + 3 + (i * 5) + 4);
1340 int rev = RADEON_BIOS8(offset);
1345 rev = RADEON_BIOS8(offset);
1347 int blocks = RADEON_BIOS8(offset + 3);
1371 RADEONLookupI2CBlock(pScrn, RADEON_BIOS8(index));
1391 RADEON_BIOS8(offset));
1394 dvo->dvo_i2c_slave_addr = RADEON_BIOS8(table_start+2);
1396 gpio_reg = RADEON_BIOS8(table_start+3);
1417 flags = RADEON_BIOS8(table_start+5);
1460 int rev = RADEON_BIOS8(offset);
1465 rev = RADEON_BIOS8(offset);
1467 int blocks = RADEON_BIOS8(offset + 3);
1507 reg = RADEON_BIOS8(index);
1509 val = RADEON_BIOS8(index);
1574 val = RADEON_BIOS8(index);
1634 uint8_t revision = RADEON_BIOS8(offset - 1);
1663 info->BiosTable.revision = RADEON_BIOS8(info->ROMHeaderStart + 4);
1694 while (RADEON_BIOS8(info->BiosTable.mem_reset_offset))
1703 (RADEON_BIOS8(info->BiosTable.short_mem_offset - 2) <= 64))
1705 RADEON_BIOS8(info->BiosTable.short_mem_offset - 3);
1710 while ((val = RADEON_BIOS8(info->BiosTable.rr3_offset + 1)) != 0) {
1725 while ((val = RADEON_BIOS8(info->BiosTable.rr4_offset + 1)) != 0) {
1869 while ((index = RADEON_BIOS8(offset)) != 0xff) {
1927 while ((index = RADEON_BIOS8(offset)) != 0) {
1980 shift = RADEON_BIOS8(offset) * 8;
1984 (((uint32_t)RADEON_BIOS8(offset)) << shift) |
1988 ormask = ((uint32_t)RADEON_BIOS8(offset)) << shift;
Indexes created Thu Jul 23 00:25:05 UTC 2026