Lines Matching defs:pRADEONEnt
75 RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn);
76 xf86CrtcPtr crtc0 = pRADEONEnt->pCrtc[0];
845 RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
856 if (pRADEONEnt->Controller[0])
859 pRADEONEnt->pCrtc[0] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs);
860 if (!pRADEONEnt->pCrtc[0])
863 pRADEONEnt->Controller[0] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1);
864 if (!pRADEONEnt->Controller[0])
867 pRADEONEnt->pCrtc[0]->driver_private = pRADEONEnt->Controller[0];
868 pRADEONEnt->Controller[0]->crtc_id = 0;
869 pRADEONEnt->Controller[0]->crtc_offset = 0;
870 pRADEONEnt->Controller[0]->initialized = FALSE;
872 pRADEONEnt->Controller[0]->can_tile = 1;
874 pRADEONEnt->Controller[0]->can_tile = 0;
875 pRADEONEnt->Controller[0]->pll_id = -1;
879 if (!pRADEONEnt->HasCRTC2)
882 pRADEONEnt->pCrtc[1] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs);
883 if (!pRADEONEnt->pCrtc[1])
886 pRADEONEnt->Controller[1] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1);
887 if (!pRADEONEnt->Controller[1])
889 free(pRADEONEnt->Controller[0]);
893 pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1];
894 pRADEONEnt->Controller[1]->crtc_id = 1;
896 pRADEONEnt->Controller[1]->crtc_offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
898 pRADEONEnt->Controller[1]->crtc_offset = AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL;
899 pRADEONEnt->Controller[1]->initialized = FALSE;
901 pRADEONEnt->Controller[1]->can_tile = 1;
903 pRADEONEnt->Controller[1]->can_tile = 0;
904 pRADEONEnt->Controller[1]->pll_id = -1;
910 pRADEONEnt->pCrtc[i] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs);
911 if (!pRADEONEnt->pCrtc[i])
914 pRADEONEnt->Controller[i] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1);
915 if (!pRADEONEnt->Controller[i])
917 free(pRADEONEnt->Controller[i]);
921 pRADEONEnt->pCrtc[i]->driver_private = pRADEONEnt->Controller[i];
922 pRADEONEnt->Controller[i]->crtc_id = i;
925 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC0_REGISTER_OFFSET;
928 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
931 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC2_REGISTER_OFFSET;
934 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC3_REGISTER_OFFSET;
937 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
940 pRADEONEnt->Controller[i]->crtc_offset = EVERGREEN_CRTC5_REGISTER_OFFSET;
943 pRADEONEnt->Controller[i]->initialized = FALSE;
945 pRADEONEnt->Controller[i]->can_tile = 1;
947 pRADEONEnt->Controller[i]->can_tile = 0;
948 pRADEONEnt->Controller[i]->pll_id = -1;