Cross Reference: /xsrc/external/mit/xf86-video-ati/dist/src/radeon

Lines Matching defs:radeon_crtc
77     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
86 	if ((radeon_crtc->crtc_id == 1) && (mode == DPMSModeOn)) {
93 	if ((radeon_crtc->crtc_id == 1) && (mode == DPMSModeOn)) {
103     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
105     if ((mode == DPMSModeOn) && radeon_crtc->enabled)
119 	radeon_crtc->enabled = TRUE;
121 	radeon_crtc->enabled = FALSE;
134     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
136     if (radeon_crtc->enabled)
475     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
477     switch (radeon_crtc->pll_algo) {
522     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
530     radeon_save_palette_on_demand(pScrn, radeon_crtc->crtc_id);
533 	OUTREG(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0);
535 	OUTREG(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
536 	OUTREG(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);
537 	OUTREG(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);
539 	OUTREG(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0x0000ffff);
540 	OUTREG(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0x0000ffff);
541 	OUTREG(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0x0000ffff);
543 	OUTREG(EVERGREEN_DC_LUT_RW_MODE + radeon_crtc->crtc_offset, 0);
544 	OUTREG(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007);
547 	    OUTREG(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, i);
548 	    OUTREG(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,
549 		   (((radeon_crtc->lut_r[i]) << 20) |
550 		    ((radeon_crtc->lut_g[i]) << 10) |
551 		    (radeon_crtc->lut_b[i])));
555 	    OUTREG(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0);
557 	    OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
558 	    OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);
559 	    OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);
561 	    OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0x0000ffff);
562 	    OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0x0000ffff);
563 	    OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0x0000ffff);
566 	PAL_SELECT(radeon_crtc->crtc_id);
574 	    OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i], radeon_crtc->lut_b[i]);
578 	    OUTREG(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id);
586     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
590 	radeon_crtc->lut_r[i] = red[i] >> 6;
591 	radeon_crtc->lut_g[i] = green[i] >> 6;
592 	radeon_crtc->lut_b[i] = blue[i] >> 6;
643     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
665     rotate_offset = radeon_legacy_allocate_memory(pScrn, &radeon_crtc->crtc_rotate_mem,
708     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
714 	radeon_legacy_free_memory(pScrn, radeon_crtc->crtc_rotate_mem);
715 	radeon_crtc->crtc_rotate_mem = NULL;
742     RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
750 	atombios_lock_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
751 	OUTREG(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, (x << 16) | y);
752 	atombios_lock_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
756 	atombios_lock_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
757 	OUTREG(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, (x << 16) | y);
758 	atombios_lock_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
760 	switch (radeon_crtc->crtc_id) {
987 	RADEONCrtcPrivatePtr  radeon_crtc = crtc->driver_private;
990 		   "continuing with desired mode\n", radeon_crtc->crtc_id);
1044       RADEONCrtcPrivatePtr  radeon_crtc = crtc->driver_private;
1045       int		    crtc = radeon_crtc->crtc_id;
1105     RADEONCrtcPrivatePtr radeon_crtc;
1113 	radeon_crtc = crtc->driver_private;
1116 	    if (!radeon_crtc->can_tile)