Lines Matching refs:dri
189 { OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, FALSE },
381 if (info->dri) {
382 free(info->dri);
383 info->dri = NULL;
1472 /* Apply memory map limitation if using an old DRI */
1473 if (info->directRenderingEnabled && !info->dri->newMemoryMap) {
1491 /* Old DRI has restrictions on the memory map */
1493 info->dri->pKernelDRMVersion->version_minor < 10 )
1675 /* If we use the DRI, we need to check if it's a version that has the
1680 info->dri->pKernelDRMVersion->version_minor < 23) {
1682 "[dri] limiting video memory to one aperture of %uK\n",
1685 "[dri] detected radeon kernel module version 1.%d but"
1687 info->dri->pKernelDRMVersion->version_minor);
1688 info->dri->newMemoryMap = FALSE;
1691 info->dri->newMemoryMap = TRUE;
2174 #ifdef XF86DRI /* zaphod FbMapSize is wrong, but no dri then */
2243 "Will attempt to use R6xx/R7xx EXA support if DRI is enabled.\n");
2352 if (!(info->dri = calloc(1, sizeof(struct radeon_dri)))) {
2353 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate dri rec!\n");
2369 "DRI at present.\n"
2371 "want Dual-head with DRI.\n");
2379 "No DRI yet on Evergreen\n");
2405 "[dri] Acceleration disabled, not initializing the DRI\n");
2409 info->dri->pLibDRMVersion = NULL;
2410 info->dri->pKernelDRMVersion = NULL;
2417 "[dri] Found DRI library version %d.%d.%d and kernel"
2419 info->dri->pLibDRMVersion->version_major,
2420 info->dri->pLibDRMVersion->version_minor,
2421 info->dri->pLibDRMVersion->version_patchlevel,
2422 info->dri->pKernelDRMVersion->version_major,
2423 info->dri->pKernelDRMVersion->version_minor,
2424 info->dri->pKernelDRMVersion->version_patchlevel);
2435 if (info->dri->pKernelDRMVersion->version_minor < 27) {
2437 "Direct rendering broken on XPRESS 200 and 200M with DRI less than 1.27\n");
2445 info->dri->gartSize = R300_DEFAULT_GART_SIZE;
2447 info->dri->gartSize = RADEON_DEFAULT_GART_SIZE;
2449 info->dri->ringSize = RADEON_DEFAULT_RING_SIZE;
2450 info->dri->bufSize = RADEON_DEFAULT_BUFFER_SIZE;
2451 info->dri->gartTexSize = RADEON_DEFAULT_GART_TEX_SIZE;
2452 info->dri->pciAperSize = RADEON_DEFAULT_PCI_APER_SIZE;
2456 OPTION_GART_SIZE, (int *)&(info->dri->gartSize))) ||
2458 OPTION_GART_SIZE_OLD, (int *)&(info->dri->gartSize)))) {
2459 switch (info->dri->gartSize) {
2471 "Illegal GART size: %d MB\n", info->dri->gartSize);
2477 OPTION_RING_SIZE, &(info->dri->ringSize))) {
2478 if (info->dri->ringSize < 1 || info->dri->ringSize >= (int)info->dri->gartSize) {
2481 info->dri->ringSize);
2487 OPTION_PCIAPER_SIZE, &(info->dri->pciAperSize))) {
2488 switch(info->dri->pciAperSize) {
2497 info->dri->pciAperSize);
2504 OPTION_BUFFER_SIZE, &(info->dri->bufSize))) {
2505 if (info->dri->bufSize < 1 || info->dri->bufSize >= (int)info->dri->gartSize) {
2508 info->dri->bufSize);
2511 if (info->dri->bufSize > 2) {
2514 info->dri->bufSize);
2517 info->dri->bufSize = 2;
2521 if (info->dri->ringSize + info->dri->bufSize + info->dri->gartTexSize >
2522 (int)info->dri->gartSize) {
2528 info->dri->gartTexSize = info->dri->gartSize - (info->dri->ringSize + info->dri->bufSize);
2538 info->dri->noBackBuffer = xf86ReturnOptValBool(info->Options,
2542 info->dri->allowPageFlip = 0;
2545 if (info->dri->noBackBuffer) {
2550 &info->dri->allowPageFlip) ? X_CONFIG : X_DEFAULT;
2553 info->dri->allowPageFlip = 0;
2566 info->dri->allowPageFlip ? "en" : "dis", reason);
2610 info->dri->pKernelDRMVersion->version_minor < 14) {
2612 "[dri] color tiling disabled because of version "
2614 "[dri] radeon.o kernel module version is %d.%d.%d but "
2616 info->dri->pKernelDRMVersion->version_major,
2617 info->dri->pKernelDRMVersion->version_minor,
2618 info->dri->pKernelDRMVersion->version_patchlevel);
3177 /* PreInit DRI first of all since we need that for getting a proper
3472 pScrn->fbOffset = info->dri->frontOffset;
3480 pScrn->memPhysBase, pScrn->fbOffset, info->dri->frontOffset);
3489 info->dri->fbX = 0;
3490 info->dri->fbY = 0;
3536 info->dri->depthBits = pScrn->depth;
3539 &info->dri->depthBits)
3542 if (info->dri->depthBits != 16 && info->dri->depthBits != 24) {
3545 info->dri->depthBits = pScrn->depth;
3550 "Using %d bit depth buffer\n", info->dri->depthBits);
3575 info->dri->depthMoves = xf86ReturnOptValBool(info->Options,
3577 if (info->dri->depthMoves && info->allowColorTiling) {
3579 } else if (info->dri->depthMoves) {
3582 info->dri->depthMoves = FALSE;
3612 info->dri->textureSize = 50;
3615 &(info->dri->textureSize))) {
3616 if (info->dri->textureSize < 0 || info->dri->textureSize > 100) {
3619 info->dri->textureSize);
3620 info->dri->textureSize = 50;
3633 info->dri->textureSize = -1;
3635 &(info->dri->textureSize))) {
3636 if (info->dri->textureSize < 0 || info->dri->textureSize > 100) {
3639 info->dri->textureSize);
3640 info->dri->textureSize = -1;
3645 pScrn->fbOffset = info->dri->frontOffset;
3658 /* Setup DRI after visuals have been established, but before fbScreenInit is
3673 "Static buffer allocation failed. Disabling DRI.\n");
3685 /* Tell DRI about new memory map */
3686 if (info->directRenderingEnabled && info->dri->newMemoryMap) {
3767 /* DRI finalisation */
3771 info->dri->pKernelDRMVersion->version_minor >= 19)
3773 if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_LOCATION, info->dri->pciGartOffset) < 0)
3777 if (info->dri->pKernelDRMVersion->version_minor >= 26) {
3778 if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_TABLE_SIZE, info->dri->pciGartSize) < 0)
3785 "DRI Finishing init !\n");
3789 /* DRI final init might have changed the memory map, we need to adjust
3809 /* Make sure surfaces are allright since DRI setup may have changed them */
4239 "DRI init changed memory map, adjusting ...\n");
4270 if (drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GETPARAM, &gp,
4357 int depthCpp = (info->dri->depthBits - 8) / 4;
4363 drmsurffree.address = info->dri->frontOffset;
4364 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_FREE,
4370 drmsurffree.address = info->dri->depthOffset;
4371 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_FREE,
4375 if (!info->dri->noBackBuffer) {
4376 drmsurffree.address = info->dri->backOffset;
4377 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_FREE,
4382 drmsurfalloc.address = info->dri->frontOffset;
4391 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_ALLOC,
4397 if ((info->dri->have3DWindows) && (!info->dri->noBackBuffer)) {
4398 drmsurfalloc.address = info->dri->backOffset;
4399 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_ALLOC,
4424 if (info->dri->have3DWindows &&
4430 drmsurfalloc.address = info->dri->depthOffset;
4435 retvalue = drmCommandWrite(info->dri->drmFD, DRM_RADEON_SURF_ALLOC,
6124 if (!info->dri->have3DWindows)
6181 Base += info->dri->backOffset - info->dri->frontOffset;
6283 info->dri->pKernelDRMVersion->version_minor >= 19 &&
6292 memcpy(info->FB + info->dri->pciGartOffset, info->dri->pciGartBackup, info->dri->pciGartSize);
6298 /* get the DRI back into shape after resume */
6350 info->dri->pKernelDRMVersion->version_minor >= 19 &&
6359 memcpy(info->dri->pciGartBackup, (info->FB + info->dri->pciGartOffset), info->dri->pciGartSize);
6366 if (info->dri->textureSize) {
6433 * wrong times, especially if we had DRI, after DRI has been stopped
6446 if (info->dri && info->dri->pDamage) {
6450 DamageUnregister(info->dri->pDamage);
6452 DamageUnregister(&pPix->drawable, info->dri->pDamage);
6454 DamageDestroy(info->dri->pDamage);
6455 info->dri->pDamage = NULL;
Indexes created Sat Apr 11 00:22:22 UTC 2026