Lines Matching refs:restore

351 RADEONRestoreTVTimingTables(ScrnInfoPtr pScrn, RADEONSavePtr restore)
360 OUTREG(RADEON_TV_UV_ADR, restore->tv_uv_adr);
361 hTable = RADEONGetHTimingTablesAddr(restore->tv_uv_adr);
362 vTable = RADEONGetVTimingTablesAddr(restore->tv_uv_adr);
365 tmp = ((uint32_t)restore->h_code_timing[ i ] << 14) | ((uint32_t)restore->h_code_timing[ i + 1 ]);
367 if (restore->h_code_timing[ i ] == 0 || restore->h_code_timing[ i + 1 ] == 0)
372 tmp = ((uint32_t)restore->v_code_timing[ i + 1 ] << 14) | ((uint32_t)restore->v_code_timing[ i ]);
374 if (restore->v_code_timing[ i ] == 0 || restore->v_code_timing[ i + 1 ] == 0)
379 /* restore TV PLLs */
381 RADEONRestoreTVPLLRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
385 OUTPLL(pScrn, RADEON_TV_PLL_CNTL, restore->tv_pll_cntl);
404 RADEONRestoreTVHVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
409 OUTREG(RADEON_TV_RGB_CNTL, restore->tv_rgb_cntl);
411 OUTREG(RADEON_TV_HTOTAL, restore->tv_htotal);
412 OUTREG(RADEON_TV_HDISP, restore->tv_hdisp);
413 OUTREG(RADEON_TV_HSTART, restore->tv_hstart);
415 OUTREG(RADEON_TV_VTOTAL, restore->tv_vtotal);
416 OUTREG(RADEON_TV_VDISP, restore->tv_vdisp);
418 OUTREG(RADEON_TV_FTOTAL, restore->tv_ftotal);
420 OUTREG(RADEON_TV_VSCALER_CNTL1, restore->tv_vscaler_cntl1);
421 OUTREG(RADEON_TV_VSCALER_CNTL2, restore->tv_vscaler_cntl2);
423 OUTREG(RADEON_TV_Y_FALL_CNTL, restore->tv_y_fall_cntl);
424 OUTREG(RADEON_TV_Y_RISE_CNTL, restore->tv_y_rise_cntl);
425 OUTREG(RADEON_TV_Y_SAW_TOOTH_CNTL, restore->tv_y_saw_tooth_cntl);
428 /* restore TV RESTART registers */
430 RADEONRestoreTVRestarts(ScrnInfoPtr pScrn, RADEONSavePtr restore)
435 OUTREG(RADEON_TV_FRESTART, restore->tv_frestart);
436 OUTREG(RADEON_TV_HRESTART, restore->tv_hrestart);
437 OUTREG(RADEON_TV_VRESTART, restore->tv_vrestart);
440 /* restore tv standard & output muxes */
442 RADEONRestoreTVOutputStd(ScrnInfoPtr pScrn, RADEONSavePtr restore)
447 OUTREG(RADEON_TV_SYNC_CNTL, restore->tv_sync_cntl);
449 OUTREG(RADEON_TV_TIMING_CNTL, restore->tv_timing_cntl);
451 OUTREG(RADEON_TV_MODULATOR_CNTL1, restore->tv_modulator_cntl1);
452 OUTREG(RADEON_TV_MODULATOR_CNTL2, restore->tv_modulator_cntl2);
454 OUTREG(RADEON_TV_PRE_DAC_MUX_CNTL, restore->tv_pre_dac_mux_cntl);
456 OUTREG(RADEON_TV_CRC_CNTL, restore->tv_crc_cntl);
461 RADEONRestoreTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore)
468 OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
474 OUTREG(RADEON_TV_DAC_CNTL, ((restore->tv_dac_cntl & ~RADEON_TV_DAC_NBLANK)
481 RADEONRestoreTVPLLRegisters(pScrn, restore);
484 RADEONRestoreTVHVRegisters(pScrn, restore);
486 OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
491 RADEONRestoreTVRestarts(pScrn, restore);
494 RADEONRestoreTVTimingTables(pScrn, restore);
497 OUTREG(RADEON_TV_MASTER_CNTL, (restore->tv_master_cntl
501 RADEONRestoreTVOutputStd(pScrn, restore);
503 OUTREG(RADEON_TV_MASTER_CNTL, restore->tv_master_cntl);
505 OUTREG(RADEON_TV_GAIN_LIMIT_SETTINGS, restore->tv_gain_limit_settings);
506 OUTREG(RADEON_TV_LINEAR_GAIN_SETTINGS, restore->tv_linear_gain_settings);
508 OUTREG(RADEON_TV_DAC_CNTL, restore->tv_dac_cntl);
1056 RADEONSavePtr restore = info->ModeReg;
1058 reloadTable = RADEONInitTVRestarts(output, restore, mode);
1060 RADEONRestoreTVRestarts(pScrn, restore);
1062 OUTREG(RADEON_TV_TIMING_CNTL, restore->tv_timing_cntl);
1065 OUTREG(RADEON_TV_MASTER_CNTL, restore->tv_master_cntl
1070 RADEONRestoreTVTimingTables(pScrn, restore);
1072 OUTREG(RADEON_TV_MASTER_CNTL, restore->tv_master_cntl);