Lines Matching refs:MMIOBase
34 while(MMIO_IN32(cPtr->MMIOBase, MR(0x4)) & 0x00100000){};}
37 {HW_DEBUG(0x4); MMIO_OUT32(cPtr->MMIOBase, MR(0x4), op);}
41 MMIO_OUT32(cPtr->MMIOBase, MR(0x5),(srcAddr)&0x7FFFFFL);}
45 MMIO_OUT32(cPtr->MMIOBase, MR(0x6), (dstAddr)&0x7FFFFFL);}
49 MMIO_OUT32(cPtr->MMIOBase, MR(0x0),(((dstPitch)&0xFFFF)<<16)| \
54 MMIO_OUT32(cPtr->MMIOBase, MR(0x7), (((Height)&0xFFFF)<<16)| \
59 MMIO_OUT32(cPtr->MMIOBase, MR(0x1),(srcAddr)&0x1FFFFFL);}
65 MMIO_OUT32(cPtr->MMIOBase, MR(0x2),\
75 MMIO_OUT32(cPtr->MMIOBase, MR(0x2), \
86 MMIO_OUT32(cPtr->MMIOBase, MR(0x2),((c)&0xFFFFFF)); \
94 MMIO_OUT32(cPtr->MMIOBase, MR(0x3), \
104 MMIO_OUT32(cPtr->MMIOBase, MR(0x3), \
115 MMIO_OUT32(cPtr->MMIOBase, MR(0x3),((c)&0xFFFFFF)); \