Cross Reference: /xsrc/external/mit/xf86-video-chips/dist/src/ct

Lines Matching refs:cPtr
113 chipsStdWriteXR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
115     outb(cPtr->PIOBase + CHIPS_XR_INDEX, index);
116     outb(cPtr->PIOBase + CHIPS_XR_DATA, value);
120 chipsStdReadXR(CHIPSPtr cPtr, CARD8 index)
122     outb(cPtr->PIOBase + CHIPS_XR_INDEX, index);
123     return inb(cPtr->PIOBase + CHIPS_XR_DATA);
127 chipsStdWriteFR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
129     outb(cPtr->PIOBase + CHIPS_FR_INDEX, index);
130     outb(cPtr->PIOBase + CHIPS_FR_DATA, value);
134 chipsStdReadFR(CHIPSPtr cPtr, CARD8 index)
136     outb(cPtr->PIOBase + CHIPS_FR_INDEX, index);
137     return inb(cPtr->PIOBase + CHIPS_FR_DATA);
141 chipsStdWriteMR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
143     outb(cPtr->PIOBase + CHIPS_MR_INDEX, index);
144     outb(cPtr->PIOBase + CHIPS_MR_DATA, value);
148 chipsStdReadMR(CHIPSPtr cPtr, CARD8 index)
150     outb(cPtr->PIOBase + CHIPS_MR_INDEX, index);
151     return inb(cPtr->PIOBase + CHIPS_MR_DATA);
155 chipsStdWriteMSS(CHIPSPtr cPtr, vgaHWPtr hwp, CARD8 value)
157     outb(cPtr->PIOBase + CHIPS_MSS, value);
161 chipsStdReadMSS(CHIPSPtr cPtr)
163     return inb(cPtr->PIOBase + CHIPS_MSS);
167 chipsStdWriteIOSS(CHIPSPtr cPtr, CARD8 value)
169     outb(cPtr->PIOBase + CHIPS_IOSS, value);
173 chipsStdReadIOSS(CHIPSPtr cPtr)
175     return inb(cPtr->PIOBase + CHIPS_IOSS);
179 CHIPSSetStdExtFuncs(CHIPSPtr cPtr)
181     cPtr->writeFR		= chipsStdWriteFR;
182     cPtr->readFR		= chipsStdReadFR;
183     cPtr->writeMR		= chipsStdWriteMR;
184     cPtr->readMR		= chipsStdReadMR;
185     cPtr->writeXR		= chipsStdWriteXR;
186     cPtr->readXR		= chipsStdReadXR;
187     cPtr->writeMSS		= chipsStdWriteMSS;
188     cPtr->readMSS		= chipsStdReadMSS;
189     cPtr->writeIOSS		= chipsStdWriteIOSS;
190     cPtr->readIOSS		= chipsStdReadIOSS;
197 #define chipsminb(p) MMIO_IN8(cPtr->MMIOBaseVGA, (p))
198 #define chipsmoutb(p,v) MMIO_OUT8(cPtr->MMIOBaseVGA, (p),(v))
201 chipsMmioWriteXR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
208 chipsMmioReadXR(CHIPSPtr cPtr, CARD8 index)
215 chipsMmioWriteFR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
222 chipsMmioReadFR(CHIPSPtr cPtr, CARD8 index)
229 chipsMmioWriteMR(CHIPSPtr cPtr, CARD8 index, CARD8 value)
236 chipsMmioReadMR(CHIPSPtr cPtr, CARD8 index)
243 chipsMmioWriteMSS(CHIPSPtr cPtr, vgaHWPtr hwp, CARD8 value)
251 	cPtr->MMIOBaseVGA = cPtr->MMIOBasePipeB;
253 	cPtr->MMIOBaseVGA = cPtr->MMIOBasePipeA;
255     hwp->MMIOBase = cPtr->MMIOBaseVGA;
266 chipsMmioReadMSS(CHIPSPtr cPtr)
272 chipsMmioWriteIOSS(CHIPSPtr cPtr, CARD8 value)
278 chipsMmioReadIOSS(CHIPSPtr cPtr)
284 CHIPSSetMmioExtFuncs(CHIPSPtr cPtr)
286     cPtr->writeFR		= chipsMmioWriteFR;
287     cPtr->readFR		= chipsMmioReadFR;
288     cPtr->writeMR		= chipsMmioWriteMR;
289     cPtr->readMR		= chipsMmioReadMR;
290     cPtr->writeXR		= chipsMmioWriteXR;
291     cPtr->readXR		= chipsMmioReadXR;
292     cPtr->writeMSS		= chipsMmioWriteMSS;
293     cPtr->readMSS		= chipsMmioReadMSS;
294     cPtr->writeIOSS		= chipsMmioWriteIOSS;
295     cPtr->readIOSS		= chipsMmioReadIOSS;