Lines Matching refs:ModeReg
32 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12]|0x02);
41 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12]);
127 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12] & ~0x01);
138 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12]);
156 pAlp->ModeReg.ExtVga[SR13] = 0x3f;
157 hwp->writeSeq(hwp, 0x13, pAlp->ModeReg.ExtVga[SR13]);
169 pAlp->ModeReg.ExtVga[SR12] &= ~0x01;
170 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12]);
182 pAlp->ModeReg.ExtVga[SR12] |= 0x01;
183 hwp->writeSeq(hwp, 0x12, pAlp->ModeReg.ExtVga[SR12]);