Lines Matching refs:dcfg
390 unsigned long acfg, gcfg, dcfg;
712 dcfg = READ_REG32(DC3_DISPLAY_CFG);
713 dcfg &= ~DC3_DCFG_TGEN;
714 WRITE_REG32(DC3_DISPLAY_CFG, dcfg);
725 dcfg = 0;
874 dcfg |= (DC3_DCFG_VDEN | DC3_DCFG_GDEN);
878 dcfg |= bpp_mask;
883 dcfg |= (unsigned long) (DC3_DCFG_TGEN | DC3_DCFG_TRUP | DC3_DCFG_PALB |
907 dcfg |= 0x000EA000;
921 dcfg |= 0x00009000;
944 dcfg |= 0x00008000;
977 dcfg |= DC3_DCFG_DCEN;
1030 WRITE_REG32(DC3_DISPLAY_CFG, dcfg);
1052 unsigned long unlock, dcfg, bpp_mask;
1078 dcfg = READ_REG32(DC3_DISPLAY_CFG) & ~(DC3_DCFG_DISP_MODE_MASK |
1080 dcfg |= bpp_mask;
1083 WRITE_REG32(DC3_DISPLAY_CFG, dcfg);
2275 unsigned long dcfg, unlock;
2281 dcfg = READ_REG32(DC3_DISPLAY_CFG);
2284 WRITE_REG32(DC3_DISPLAY_CFG, dcfg & ~DC3_DCFG_PALB);
2303 unsigned long unlock, dcfg, i;
2309 dcfg = READ_REG32(DC3_DISPLAY_CFG);
2312 WRITE_REG32(DC3_DISPLAY_CFG, dcfg & ~DC3_DCFG_PALB);
2596 vg_state->dcfg = READ_REG32(DC3_DISPLAY_CFG);
2854 WRITE_REG32(DC3_DISPLAY_CFG, vg_state->dcfg);