Lines Matching refs:pll_flags
1679 vg_set_clock_frequency(unsigned long frequency, unsigned long pll_flags)
1694 if (!(pll_flags & VG_PLL_MANUAL)) {
1717 if (pll_flags & VG_PLL_DIVIDE_BY_2)
1719 if (pll_flags & VG_PLL_DIVIDE_BY_4)
1721 if (pll_flags & VG_PLL_BYPASS)
1723 if (pll_flags & VG_PLL_VIP_CLOCK)
2687 vg_state->pll_flags = 0;
2700 vg_state->pll_flags |= VG_PLL_MANUAL;
2703 vg_state->pll_flags |= VG_PLL_DIVIDE_BY_2;
2705 vg_state->pll_flags |= VG_PLL_BYPASS;
2707 vg_state->pll_flags |= VG_PLL_DIVIDE_BY_4;
2709 vg_state->pll_flags |= VG_PLL_VIP_CLOCK;
2836 vg_set_clock_frequency(vg_state->dot_pll, vg_state->pll_flags);