Lines Matching refs:genlk_ctl
669 unsigned long unlock, genlk_ctl;
675 genlk_ctl = READ_REG32(DC3_GENLK_CTL);
701 genlk_ctl |= DC3_GC_GENLOCK_TO_ENABLE;
703 genlk_ctl &= ~DC3_GC_GENLOCK_TO_ENABLE;
705 genlk_ctl &= ~DC3_GC_GENLOCK_SKEW_MASK;
706 genlk_ctl |= buffer->genlock_skew & DC3_GC_GENLOCK_SKEW_MASK;
709 WRITE_REG32(DC3_GENLK_CTL, genlk_ctl);
1382 unsigned long genlk_ctl;
1387 genlk_ctl = READ_REG32(DC3_GENLK_CTL);
1403 if (genlk_ctl & DC3_GC_GENLOCK_TO_ENABLE)
1408 buffer->genlock_skew = genlk_ctl & DC3_GC_GENLOCK_SKEW_MASK;