Lines Matching refs:ctrl2
45 unsigned long ctrl2, mode;
48 ctrl2 =
85 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000f9 | ctrl2);
177 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000d9 | ctrl2);
260 unsigned long ctrl2, ctrl3;
262 ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
264 ctrl2 &= ~(SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_MASK);
270 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
276 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_SVIDEO);
283 ctrl2 | SC1200_TVENC_OUTPUT_YCBCR |
291 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
300 ctrl2 = READ_VID32(SC1200_TVENC_DAC_CONTROL);
301 ctrl2 &= ~SC1200_TVENC_TRIM_MASK;
305 ctrl2 |= 0x7;
307 ctrl2 |= 0x5;
309 WRITE_VID32(SC1200_TVENC_DAC_CONTROL, ctrl2);
792 unsigned long ctrl2, ctrl3;
795 ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
798 if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_SVIDEO)
800 else if (ctrl2 & SC1200_TVENC_OUTPUT_YCBCR)
802 else if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_CVBS) {