Lines Matching refs:inRegAddr
3047 ReadGx(unsigned long inRegAddr)
3051 DMAL_ReadUInt32(inRegAddr, &data);
3057 WriteGx(unsigned long inRegAddr, unsigned long inData)
3068 (DC_H_TIMING_1 == inRegAddr) ||
3069 (DC_H_TIMING_2 == inRegAddr) ||
3070 (DC_H_TIMING_3 == inRegAddr) ||
3071 (DC_FP_H_TIMING == inRegAddr) ||
3072 (DC_V_TIMING_1 == inRegAddr) ||
3073 (DC_V_TIMING_2 == inRegAddr) ||
3074 (DC_V_TIMING_3 == inRegAddr) || (DC_FP_V_TIMING == inRegAddr);
3084 DMAL_WriteUInt32(inRegAddr, inData);