Lines Matching defs:OUT_BATCH

301 #define OUT_BATCH(v) batch_emit(sna, v)
502 OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2));
503 OUT_BATCH(sna->render_state.gen7.info->urb.push_ps_size);
506 OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2));
507 OUT_BATCH((sna->render_state.gen7.info->urb.max_vs_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) |
511 OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2));
512 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
515 OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2));
516 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
519 OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2));
520 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
529 OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
530 OUT_BATCH(0); /* general */
531 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */
536 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* dynamic */
541 OUT_BATCH(0); /* indirect */
542 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */
549 OUT_BATCH(0);
550 OUT_BATCH(BASE_ADDRESS_MODIFY);
551 OUT_BATCH(0);
552 OUT_BATCH(BASE_ADDRESS_MODIFY);
567 OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2));
568 OUT_BATCH(0); /* no VS kernel */
569 OUT_BATCH(0);
570 OUT_BATCH(0);
571 OUT_BATCH(0);
572 OUT_BATCH(0); /* pass-through */
575 OUT_BATCH(GEN7_3DSTATE_CONSTANT_VS | (7 - 2));
576 OUT_BATCH(0);
577 OUT_BATCH(0);
578 OUT_BATCH(0);
579 OUT_BATCH(0);
580 OUT_BATCH(0);
581 OUT_BATCH(0);
583 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2));
584 OUT_BATCH(0);
586 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2));
587 OUT_BATCH(0);
594 OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2));
595 OUT_BATCH(0); /* no HS kernel */
596 OUT_BATCH(0);
597 OUT_BATCH(0);
598 OUT_BATCH(0);
599 OUT_BATCH(0);
600 OUT_BATCH(0); /* pass-through */
603 OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7 - 2));
604 OUT_BATCH(0);
605 OUT_BATCH(0);
606 OUT_BATCH(0);
607 OUT_BATCH(0);
608 OUT_BATCH(0);
609 OUT_BATCH(0);
611 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2));
612 OUT_BATCH(0);
614 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2));
615 OUT_BATCH(0);
622 OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2));
623 OUT_BATCH(0);
624 OUT_BATCH(0);
625 OUT_BATCH(0);
631 OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2));
632 OUT_BATCH(0);
633 OUT_BATCH(0);
634 OUT_BATCH(0);
635 OUT_BATCH(0);
636 OUT_BATCH(0);
639 OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7 - 2));
640 OUT_BATCH(0);
641 OUT_BATCH(0);
642 OUT_BATCH(0);
643 OUT_BATCH(0);
644 OUT_BATCH(0);
645 OUT_BATCH(0);
647 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2));
648 OUT_BATCH(0);
650 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2));
651 OUT_BATCH(0);
658 OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2));
659 OUT_BATCH(0); /* no GS kernel */
660 OUT_BATCH(0);
661 OUT_BATCH(0);
662 OUT_BATCH(0);
663 OUT_BATCH(0);
664 OUT_BATCH(0); /* pass-through */
667 OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (7 - 2));
668 OUT_BATCH(0);
669 OUT_BATCH(0);
670 OUT_BATCH(0);
671 OUT_BATCH(0);
672 OUT_BATCH(0);
673 OUT_BATCH(0);
675 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2));
676 OUT_BATCH(0);
678 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2));
679 OUT_BATCH(0);
686 OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2));
687 OUT_BATCH(0);
688 OUT_BATCH(0);
694 OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2));
695 OUT_BATCH(0);
696 OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE);
697 OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
698 OUT_BATCH(0);
699 OUT_BATCH(0);
700 OUT_BATCH(0);
707 OUT_BATCH(GEN7_3DSTATE_CC_STATE_POINTERS | (2 - 2));
708 OUT_BATCH(0);
710 OUT_BATCH(GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2));
711 OUT_BATCH(0);
715 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2));
716 OUT_BATCH(0);
722 OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2));
723 OUT_BATCH(0);
724 OUT_BATCH(0); /* pass-through */
725 OUT_BATCH(0);
727 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2));
728 OUT_BATCH(0);
734 OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2));
735 OUT_BATCH(GEN7_WM_DISPATCH_ENABLE |
737 OUT_BATCH(0);
741 OUT_BATCH(GEN7_3DSTATE_CONSTANT_PS | (7 - 2));
742 OUT_BATCH(0);
743 OUT_BATCH(0);
744 OUT_BATCH(0);
745 OUT_BATCH(0);
746 OUT_BATCH(0);
747 OUT_BATCH(0);
754 OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2));
755 OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
757 OUT_BATCH(0); /* disable depth, stencil and hiz */
758 OUT_BATCH(0);
759 OUT_BATCH(0);
760 OUT_BATCH(0);
761 OUT_BATCH(0);
764 OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2));
765 OUT_BATCH(0);
766 OUT_BATCH(0);
773 OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D);
775 OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2));
776 OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
778 OUT_BATCH(0);
779 OUT_BATCH(0);
781 OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2));
782 OUT_BATCH(1);
818 OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2));
819 OUT_BATCH((render->cc_blend + blend_offset) | 1);
835 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2));
836 OUT_BATCH(sna->render_state.gen7.wm_state + state);
852 OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2));
853 OUT_BATCH(num_sf_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
856 OUT_BATCH(0);
857 OUT_BATCH(0); /* dw4 */
858 OUT_BATCH(0);
859 OUT_BATCH(0);
860 OUT_BATCH(0);
861 OUT_BATCH(0); /* dw8 */
862 OUT_BATCH(0);
863 OUT_BATCH(0);
864 OUT_BATCH(0);
865 OUT_BATCH(0); /* dw12 */
866 OUT_BATCH(0);
867 OUT_BATCH(0);
887 OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2));
888 OUT_BATCH(kernels[0] ?: kernels[1] ?: kernels[2]);
889 OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT |
891 OUT_BATCH(0); /* scratch address */
892 OUT_BATCH(sna->render_state.gen7.info->max_wm_threads |
897 OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN7_PS_DISPATCH_START_GRF_SHIFT_0 |
900 OUT_BATCH(kernels[2]);
901 OUT_BATCH(kernels[1]);
912 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2));
913 OUT_BATCH(offset*4);
936 OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
937 OUT_BATCH(0);
938 OUT_BATCH(limit);
939 OUT_BATCH(offset);
973 OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
976 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
979 OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT |
985 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
988 OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
1024 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1027 OUT_BATCH(dw);
1056 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1059 OUT_BATCH(dw);
1066 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1067 OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH |
1070 OUT_BATCH(0);
1071 OUT_BATCH(0);
1087 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1088 OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH | stall);
1089 OUT_BATCH(0);
1090 OUT_BATCH(0);
1096 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1097 OUT_BATCH(GEN7_PIPE_CONTROL_CS_STALL |
1099 OUT_BATCH(0);
1100 OUT_BATCH(0);
1182 OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2));
1183 OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
1184 OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start);
1185 OUT_BATCH(sna->render.vertex_start);
1186 OUT_BATCH(1); /* single instance */
1187 OUT_BATCH(0); /* start instance location */
1188 OUT_BATCH(0); /* index buffer offset, ignored */
1344 OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2));
1345 OUT_BATCH(id << GEN7_VB0_BUFFER_INDEX_SHIFT |
1350 OUT_BATCH(0);
1351 OUT_BATCH(~0); /* max address: disabled */
1352 OUT_BATCH(0);
1364 OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2));
1365 OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
1367 OUT_BATCH(0); /* vertex count, to be filled in later */
1368 OUT_BATCH(sna->render.vertex_index);
1369 OUT_BATCH(1); /* single instance */
1370 OUT_BATCH(0); /* start instance location */
1371 OUT_BATCH(0); /* index buffer offset, ignored */