Lines Matching refs:target_msc

1235 	DBG(("%s: converting target_msc=%llu to seq %u\n",
2498 uint64_t target_msc,
2512 if (target_msc)
2515 DBG(("%s: current_msc=%ld, target_msc=%ld -- %s\n",
2516 __FUNCTION__, (long)*current_msc, (long)target_msc,
2517 (*current_msc >= target_msc - 1) ? "yes" : "no"));
2518 return *current_msc >= target_msc - 1;
2530 CARD64 *target_msc, CARD64 divisor, CARD64 remainder,
2537 if (immediate_swap(sna, *target_msc, divisor, draw, crtc, &current_msc)) {
2553 if (info->mode || current_msc >= *target_msc) {
2593 info->type = type = use_triple_buffer(sna, client, *target_msc == 0);
2612 DBG(("%s: target_msc=%llu\n", __FUNCTION__, current_msc + 1));
2613 *target_msc = current_msc + 1;
2630 * If divisor is zero, or current_msc is smaller than target_msc
2631 * we just need to make sure target_msc passes before initiating
2634 if (divisor && current_msc >= *target_msc) {
2638 (long long)*target_msc,
2642 *target_msc = current_msc + remainder - current_msc % divisor;
2643 if (*target_msc <= current_msc)
2644 *target_msc += divisor;
2647 if (*target_msc <= current_msc + 1) {
2652 *target_msc = current_msc + 1;
2663 vbl.reply.sequence = draw_target_seq(draw, *target_msc - 1);
2673 DBG(("%s: reported target_msc=%llu\n", __FUNCTION__, *target_msc));
2681 CARD64 *target_msc, CARD64 divisor, CARD64 remainder,
2688 if (!immediate_swap(sna, *target_msc, divisor, draw, crtc, &current_msc))
2691 sync = current_msc < *target_msc;
2735 *target_msc = current_msc + 1;
2742 CARD64 *target_msc, CARD64 divisor, CARD64 remainder,
2749 if (!immediate_swap(sna, *target_msc, divisor, draw, crtc, &current_msc))
2752 sync = current_msc < *target_msc;
2796 *target_msc = current_msc + 1;
2830 DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor,
2855 DBG(("%s(target_msc=%llu, divisor=%llu, remainder=%llu)\n",
2857 (long long)*target_msc,
2920 target_msc, divisor, remainder,
2926 target_msc, divisor, remainder,
2932 target_msc, divisor, remainder,
2949 if (immediate_swap(sna, *target_msc, divisor, draw, crtc, &current_msc)) {
2950 bool sync = current_msc < *target_msc;
2953 *target_msc = current_msc + sync;
2963 * If divisor is zero, or current_msc is smaller than target_msc
2964 * we just need to make sure target_msc passes before initiating
2969 if (divisor && current_msc >= *target_msc) {
2973 (long long)*target_msc,
2977 *target_msc = current_msc + remainder - current_msc % divisor;
2978 if (*target_msc <= current_msc)
2979 *target_msc += divisor;
2981 vbl.request.sequence = draw_target_seq(draw, *target_msc - 1);
2982 if (*target_msc <= current_msc + 1) {
2994 *target_msc = current_msc + 1;
3001 DBG(("%s: reported target_msc=%llu\n", __FUNCTION__, *target_msc));
3020 *target_msc = 0; /* offscreen, so zero out target vblank count */
3065 sna_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw, CARD64 target_msc,
3077 DBG(("%s(pipe=%d, target_msc=%llu, divisor=%llu, rem=%llu)\n",
3079 (long long)target_msc,
3099 /* If target_msc already reached or passed, set it to
3105 if (divisor == 0 && current_msc >= target_msc)
3118 * If divisor is zero, or current_msc is smaller than target_msc,
3119 * we just need to make sure target_msc passes before waking up the
3122 if (divisor && current_msc >= target_msc) {
3126 (long long)target_msc,
3129 target_msc = current_msc + remainder - current_msc % divisor;
3130 if (target_msc <= current_msc)
3131 target_msc += divisor;
3133 vbl.request.sequence = draw_target_seq(draw, target_msc);