Lines Matching refs:LVDS
904 * - LVDS/DVOB/DVOC on
979 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
1408 /** @defgroup LVDS
1412 * This register controls the LVDS output enable, pipe selection, and data
1417 #define LVDS 0x61180
1419 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
1420 * the DPLL semantics change when the LVDS is assigned to that pipe.
1423 /** Selects pipe B for LVDS data. Must be set on pre-965. */
1478 * Tri-state the LVDS buffers when powered down, otherwise
1543 * Overridden by global LVDS power sequencing