Lines Matching defs:dtd
553 /** Fetches either input or output timings to *dtd, depending on cmd. */
555 i830_sdvo_get_timing(xf86OutputPtr output, uint8_t cmd, struct i830_sdvo_dtd *dtd)
561 status = i830_sdvo_read_response(output, &dtd->part1, sizeof(dtd->part1));
567 status = i830_sdvo_read_response(output, &dtd->part2, sizeof(dtd->part2));
575 i830_sdvo_get_input_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
577 return i830_sdvo_get_timing(output, SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
581 i830_sdvo_get_output_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
583 return i830_sdvo_get_timing(output, SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd);
586 /** Sets either input or output timings from *dtd, depending on cmd. */
589 struct i830_sdvo_dtd *dtd)
593 i830_sdvo_write_cmd(output, cmd, &dtd->part1, sizeof(dtd->part1));
598 i830_sdvo_write_cmd(output, cmd + 1, &dtd->part2, sizeof(dtd->part2));
607 i830_sdvo_set_input_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
609 return i830_sdvo_set_timing(output, SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
613 i830_sdvo_set_output_timing(xf86OutputPtr output, struct i830_sdvo_dtd *dtd)
615 return i830_sdvo_set_timing(output, SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
648 struct i830_sdvo_dtd *dtd)
655 status = i830_sdvo_read_response(output, &dtd->part1, sizeof(dtd->part1));
662 status = i830_sdvo_read_response(output, &dtd->part2, sizeof(dtd->part2));
713 i830_sdvo_get_dtd_from_mode(struct i830_sdvo_dtd *dtd, DisplayModePtr mode)
732 dtd->part1.clock = mode->Clock / 10;
733 dtd->part1.h_active = width & 0xff;
734 dtd->part1.h_blank = h_blank_len & 0xff;
735 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
737 dtd->part1.v_active = height & 0xff;
738 dtd->part1.v_blank = v_blank_len & 0xff;
739 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
742 dtd->part2.h_sync_off = h_sync_offset & 0xff;
743 dtd->part2.h_sync_width = h_sync_len & 0xff;
744 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
746 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
750 dtd->part2.dtd_flags = 0x18;
752 dtd->part2.dtd_flags |= 0x2;
754 dtd->part2.dtd_flags |= 0x4;
756 dtd->part2.sdvo_flags = 0;
757 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
758 dtd->part2.reserved = 0;
762 i830_sdvo_get_mode_from_dtd(DisplayModePtr mode, struct i830_sdvo_dtd *dtd)
764 mode->HDisplay = dtd->part1.h_active;
765 mode->HDisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
766 mode->HSyncStart = mode->HDisplay + dtd->part2.h_sync_off;
767 mode->HSyncStart += (dtd->part2.sync_off_width_high & 0xc0) << 2;
768 mode->HSyncEnd = mode->HSyncStart + dtd->part2.h_sync_width;
769 mode->HSyncEnd += (dtd->part2.sync_off_width_high & 0x30) << 4;
770 mode->HTotal = mode->HDisplay + dtd->part1.h_blank;
771 mode->HTotal += (dtd->part1.h_high & 0xf) << 8;
773 mode->VDisplay = dtd->part1.v_active;
774 mode->VDisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
776 mode->VSyncStart += (dtd->part2.v_sync_off_width >> 4) & 0xf;
777 mode->VSyncStart += (dtd->part2.sync_off_width_high & 0x0c) << 2;
778 mode->VSyncStart += dtd->part2.v_sync_off_high & 0xc0;
779 mode->VSyncEnd = mode->VSyncStart + (dtd->part2.v_sync_off_width & 0xf);
780 mode->VSyncEnd += (dtd->part2.sync_off_width_high & 0x3) << 4;
781 mode->VTotal = mode->VDisplay + dtd->part1.v_blank;
782 mode->VTotal += (dtd->part1.v_high & 0xf) << 8;
784 mode->Clock = dtd->part1.clock * 10;
787 if (dtd->part2.dtd_flags & 0x2)
789 if (dtd->part2.dtd_flags & 0x4)