Lines Matching defs:OUT_BATCH
338 #define OUT_BATCH(v) batch_emit(sna, v)
539 OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2));
540 OUT_BATCH(sna->render_state.gen7.info->urb.push_ps_size);
543 OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2));
544 OUT_BATCH((sna->render_state.gen7.info->urb.max_vs_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) |
548 OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2));
549 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
552 OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2));
553 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
556 OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2));
557 OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) |
566 OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
567 OUT_BATCH(0); /* general */
568 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */
573 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* dynamic */
578 OUT_BATCH(0); /* indirect */
579 OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */
586 OUT_BATCH(0);
587 OUT_BATCH(BASE_ADDRESS_MODIFY);
588 OUT_BATCH(0);
589 OUT_BATCH(BASE_ADDRESS_MODIFY);
604 OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2));
605 OUT_BATCH(0); /* no VS kernel */
606 OUT_BATCH(0);
607 OUT_BATCH(0);
608 OUT_BATCH(0);
609 OUT_BATCH(0); /* pass-through */
612 OUT_BATCH(GEN7_3DSTATE_CONSTANT_VS | (7 - 2));
613 OUT_BATCH(0);
614 OUT_BATCH(0);
615 OUT_BATCH(0);
616 OUT_BATCH(0);
617 OUT_BATCH(0);
618 OUT_BATCH(0);
620 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2));
621 OUT_BATCH(0);
623 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2));
624 OUT_BATCH(0);
631 OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2));
632 OUT_BATCH(0); /* no HS kernel */
633 OUT_BATCH(0);
634 OUT_BATCH(0);
635 OUT_BATCH(0);
636 OUT_BATCH(0);
637 OUT_BATCH(0); /* pass-through */
640 OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7 - 2));
641 OUT_BATCH(0);
642 OUT_BATCH(0);
643 OUT_BATCH(0);
644 OUT_BATCH(0);
645 OUT_BATCH(0);
646 OUT_BATCH(0);
648 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2));
649 OUT_BATCH(0);
651 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2));
652 OUT_BATCH(0);
659 OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2));
660 OUT_BATCH(0);
661 OUT_BATCH(0);
662 OUT_BATCH(0);
668 OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2));
669 OUT_BATCH(0);
670 OUT_BATCH(0);
671 OUT_BATCH(0);
672 OUT_BATCH(0);
673 OUT_BATCH(0);
676 OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7 - 2));
677 OUT_BATCH(0);
678 OUT_BATCH(0);
679 OUT_BATCH(0);
680 OUT_BATCH(0);
681 OUT_BATCH(0);
682 OUT_BATCH(0);
684 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2));
685 OUT_BATCH(0);
687 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2));
688 OUT_BATCH(0);
695 OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2));
696 OUT_BATCH(0); /* no GS kernel */
697 OUT_BATCH(0);
698 OUT_BATCH(0);
699 OUT_BATCH(0);
700 OUT_BATCH(0);
701 OUT_BATCH(0); /* pass-through */
704 OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (7 - 2));
705 OUT_BATCH(0);
706 OUT_BATCH(0);
707 OUT_BATCH(0);
708 OUT_BATCH(0);
709 OUT_BATCH(0);
710 OUT_BATCH(0);
712 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2));
713 OUT_BATCH(0);
715 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2));
716 OUT_BATCH(0);
723 OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2));
724 OUT_BATCH(0);
725 OUT_BATCH(0);
731 OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2));
732 OUT_BATCH(0);
733 OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE);
734 OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT);
735 OUT_BATCH(0);
736 OUT_BATCH(0);
737 OUT_BATCH(0);
744 OUT_BATCH(GEN7_3DSTATE_CC_STATE_POINTERS | (2 - 2));
745 OUT_BATCH(0);
747 OUT_BATCH(GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2));
748 OUT_BATCH(0);
752 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2));
753 OUT_BATCH(0);
759 OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2));
760 OUT_BATCH(0);
761 OUT_BATCH(0); /* pass-through */
762 OUT_BATCH(0);
764 OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2));
765 OUT_BATCH(0);
771 OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2));
772 OUT_BATCH(GEN7_WM_DISPATCH_ENABLE |
774 OUT_BATCH(0);
778 OUT_BATCH(GEN7_3DSTATE_CONSTANT_PS | (7 - 2));
779 OUT_BATCH(0);
780 OUT_BATCH(0);
781 OUT_BATCH(0);
782 OUT_BATCH(0);
783 OUT_BATCH(0);
784 OUT_BATCH(0);
791 OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2));
792 OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
794 OUT_BATCH(0); /* disable depth, stencil and hiz */
795 OUT_BATCH(0);
796 OUT_BATCH(0);
797 OUT_BATCH(0);
798 OUT_BATCH(0);
801 OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2));
802 OUT_BATCH(0);
803 OUT_BATCH(0);
810 OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D);
812 OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2));
813 OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
815 OUT_BATCH(0);
816 OUT_BATCH(0);
818 OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2));
819 OUT_BATCH(1);
855 OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2));
856 OUT_BATCH((render->cc_blend + blend_offset) | 1);
872 OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2));
873 OUT_BATCH(sna->render_state.gen7.wm_state + state);
889 OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2));
890 OUT_BATCH(num_sf_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
893 OUT_BATCH(0);
894 OUT_BATCH(0); /* dw4 */
895 OUT_BATCH(0);
896 OUT_BATCH(0);
897 OUT_BATCH(0);
898 OUT_BATCH(0); /* dw8 */
899 OUT_BATCH(0);
900 OUT_BATCH(0);
901 OUT_BATCH(0);
902 OUT_BATCH(0); /* dw12 */
903 OUT_BATCH(0);
904 OUT_BATCH(0);
924 OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2));
925 OUT_BATCH(kernels[0] ?: kernels[1] ?: kernels[2]);
926 OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT |
928 OUT_BATCH(0); /* scratch address */
929 OUT_BATCH(sna->render_state.gen7.info->max_wm_threads |
934 OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN7_PS_DISPATCH_START_GRF_SHIFT_0 |
937 OUT_BATCH(kernels[2]);
938 OUT_BATCH(kernels[1]);
949 OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2));
950 OUT_BATCH(offset*4);
973 OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
974 OUT_BATCH(0);
975 OUT_BATCH(limit);
976 OUT_BATCH(offset);
1010 OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS |
1013 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1016 OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT |
1022 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1025 OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT |
1061 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1064 OUT_BATCH(dw);
1093 OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID |
1096 OUT_BATCH(dw);
1103 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1104 OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH |
1107 OUT_BATCH(0);
1108 OUT_BATCH(0);
1124 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1125 OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH | stall);
1126 OUT_BATCH(0);
1127 OUT_BATCH(0);
1133 OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2));
1134 OUT_BATCH(GEN7_PIPE_CONTROL_CS_STALL |
1136 OUT_BATCH(0);
1137 OUT_BATCH(0);
1219 OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2));
1220 OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
1221 OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start);
1222 OUT_BATCH(sna->render.vertex_start);
1223 OUT_BATCH(1); /* single instance */
1224 OUT_BATCH(0); /* start instance location */
1225 OUT_BATCH(0); /* index buffer offset, ignored */
1381 OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2));
1382 OUT_BATCH(id << GEN7_VB0_BUFFER_INDEX_SHIFT |
1387 OUT_BATCH(0);
1388 OUT_BATCH(~0); /* max address: disabled */
1389 OUT_BATCH(0);
1401 OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2));
1402 OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST);
1404 OUT_BATCH(0); /* vertex count, to be filled in later */
1405 OUT_BATCH(sna->render.vertex_index);
1406 OUT_BATCH(1); /* single instance */
1407 OUT_BATCH(0); /* start instance location */
1408 OUT_BATCH(0); /* index buffer offset, ignored */
Indexes created Sun Jul 05 00:25:41 UTC 2026