Lines Matching refs:dst_priv
2037 struct sna_pixmap *dst_priv)
2052 dst_priv->pixmap->drawable.serialNumber,
2055 dst_priv->cow ? IS_COW_OWNER(dst_priv->cow) ? 1 : -1 : 0));
2057 if (dst_priv->pinned) {
2059 __FUNCTION__, dst_priv->pinned));
2063 assert(dst_priv->move_to_gpu == NULL);
2064 assert(!dst_priv->flush);
2065 assert(list_is_empty(&dst_priv->cow_list));
2090 if (cow == COW(dst_priv->cow)) {
2091 assert(dst_priv->gpu_bo == cow->bo);
2095 if (dst_priv->cow)
2096 sna_pixmap_undo_cow(sna, dst_priv, 0);
2098 if (dst_priv->gpu_bo) {
2099 sna_pixmap_unmap(dst_priv->pixmap, dst_priv);
2100 kgem_bo_destroy(&sna->kgem, dst_priv->gpu_bo);
2102 assert(!dst_priv->mapped);
2103 dst_priv->gpu_bo = kgem_bo_reference(cow->bo);
2104 dst_priv->cow = cow;
2105 list_add(&dst_priv->cow_list, &cow->list);
2110 dst_priv->pixmap->drawable.serialNumber,
6058 struct sna_pixmap *dst_priv,
6063 assert(dst_priv);
6065 if (wedged(sna) && !dst_priv->pinned)
6155 PixmapPtr dst_pixmap, struct sna_pixmap *dst_priv,
6174 if (dst_priv == src_priv) {
6180 if (dst_priv && dst_priv->gpu_bo)
6228 if (dst_priv &&
6284 switch (dst_priv->gpu_bo->tiling) {
6297 if (dst_priv->move_to_gpu) {
6302 if (!can_upload__tiled_x(&sna->kgem, dst_priv->gpu_bo) ||
6303 __kgem_bo_is_busy(&sna->kgem, dst_priv->gpu_bo)) {
6304 if (replaces && !dst_priv->pinned) {
6309 if (dst_priv->gpu_bo->scanout)
6316 dst_priv->gpu_bo->tiling,
6321 sna_pixmap_unmap(dst_pixmap, dst_priv);
6322 kgem_bo_destroy(&sna->kgem, dst_priv->gpu_bo);
6323 dst_priv->gpu_bo = bo;
6329 if (!can_upload__tiled_x(&sna->kgem, dst_priv->gpu_bo)) {
6342 if (kgem_bo_can_map__cpu(&sna->kgem, dst_priv->gpu_bo, true)) {
6343 ptr = kgem_bo_map__cpu(&sna->kgem, dst_priv->gpu_bo);
6349 kgem_bo_sync__cpu(&sna->kgem, dst_priv->gpu_bo);
6351 ptr = kgem_bo_map__wc(&sna->kgem, dst_priv->gpu_bo);
6357 kgem_bo_sync__gtt(&sna->kgem, dst_priv->gpu_bo);
6360 if (!DAMAGE_IS_ALL(dst_priv->gpu_damage)) {
6361 assert(!dst_priv->clear);
6362 sna_damage_add_to_pixmap(&dst_priv->gpu_damage, region, dst_pixmap);
6363 if (sna_damage_is_all(&dst_priv->gpu_damage,
6368 sna_damage_destroy(&dst_priv->cpu_damage);
6369 list_del(&dst_priv->flush_list);
6371 sna_damage_subtract(&dst_priv->cpu_damage,
6374 dst_priv->clear = false;
6383 if (dst_priv->gpu_bo->tiling) {
6385 assert(dst_priv->gpu_bo->tiling == I915_TILING_X);
6391 dst_priv->gpu_bo->pitch,
6404 dst_priv->gpu_bo->pitch,
6411 if (!dst_priv->shm) {
6413 dst_pixmap->devKind = dst_priv->gpu_bo->pitch;
6414 if (ptr == MAP(dst_priv->gpu_bo->map__cpu)) {
6415 dst_priv->mapped = MAPPED_CPU;
6416 dst_priv->cpu = true;
6418 dst_priv->mapped = MAPPED_GTT;
6419 assert_pixmap_map(dst_pixmap, dst_priv);
6462 struct sna_pixmap *dst_priv = sna_pixmap(dst_pixmap);
6526 dst_priv,
6527 dst_priv && dst_priv->gpu_bo ? dst_priv->gpu_bo->handle : 0,
6528 dst_priv && dst_priv->cpu_bo ? dst_priv->cpu_bo->handle : 0,
6534 if (dst_priv == NULL) {
6541 COW(src_priv->cow) == COW(dst_priv->cow)) {
6546 } else if (IS_COW_OWNER(dst_priv->cow)) {
6551 assert(dst_priv->move_to_gpu == NULL);
6552 bo = dst_priv->gpu_bo;
6559 hint = copy_prefer_gpu(sna, dst_priv, src_priv, region, src_dx, src_dy);
6561 discard_cpu_damage(sna, dst_priv);
6566 if (dst_priv->cpu_damage &&
6568 dst_priv->cpu_damage))
6569 discard_cpu_damage(sna, dst_priv);
6589 kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo);
6601 if (replaces && bo == dst_priv->gpu_bo) {
6604 dst_priv->gpu_bo->handle,
6606 dst_priv->clear = true;
6607 dst_priv->clear_color = color;
6608 sna_damage_all(&dst_priv->gpu_damage, dst_pixmap);
6609 sna_damage_destroy(&dst_priv->cpu_damage);
6610 list_del(&dst_priv->flush_list);
6635 move_to_gpu(src_pixmap, src_priv, region, src_dx, src_dy, alu, bo == dst_priv->gpu_bo) &&
6640 kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo);
6647 if (sna_pixmap_make_cow(sna, src_priv, dst_priv)) {
6648 assert(dst_priv->gpu_bo == src_priv->gpu_bo);
6649 sna_damage_all(&dst_priv->gpu_damage, dst_pixmap);
6650 sna_damage_destroy(&dst_priv->cpu_damage);
6651 list_del(&dst_priv->flush_list);
6652 add_shm_flush(sna, dst_priv);
6691 kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo);
6707 if (bo != dst_priv->gpu_bo)
6710 if (use_shm_bo(sna, bo, src_priv, alu, replaces && !dst_priv->pinned)) {
6716 assert(bo != dst_priv->cpu_bo);
6729 kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo);
6881 if (!dst_priv->pinned && replaces) {
6891 assert(!DAMAGE_IS_ALL(dst_priv->cpu_damage));
6893 dst_priv->gpu_bo, 0, 0,
6903 assert(dst_priv->clear == false);
6904 dst_priv->cpu = false;
6906 assert(!dst_priv->clear);
6907 assert(dst_priv->gpu_bo);
6908 assert(dst_priv->gpu_bo->proxy == NULL);
6909 assert(*damage == dst_priv->gpu_damage);
6911 sna_damage_destroy(&dst_priv->cpu_damage);
6912 sna_damage_all(&dst_priv->gpu_damage, dst_pixmap);
6913 list_del(&dst_priv->flush_list);
6915 sna_damage_add(&dst_priv->gpu_damage,
6929 if (dst_priv) {
6955 dst_pixmap, dst_priv,
6984 if (dst_priv) {
6995 assert(dst_priv == sna_pixmap(dst_pixmap));
7028 assert(has_coherent_ptr(sna, dst_priv, MOVE_WRITE));