Lines Matching refs:target_msc
46 uint64_t target_msc;
150 if (msc_before(msc, info->target_msc)) {
154 (long long)msc, (long long)info->target_msc));
164 (long long)msc, (long long)info->target_msc,
166 info->target_msc && msc == (uint32_t)info->target_msc ? "" : ": MISS"));
235 __FUNCTION__, (long long)info->event_id[0], (long long)info->target_msc, (long long)msc));
236 if (msc_before(msc, info->target_msc)) {
237 int delta = info->target_msc - msc;
241 assert(info->target_msc - msc < 1ull<<31);
244 vbl.request.sequence = info->target_msc;
247 DBG(("%s: scheduled new vblank event for %lld\n", __FUNCTION__, (long long)info->target_msc));
254 delay = msc_to_delay(info->crtc, info->target_msc);
265 vbl.request.sequence = info->target_msc;
278 msc = info->target_msc;
280 __FUNCTION__, (long long)info->event_id[0], (long long)info->target_msc, (long long)sna_crtc_last_swap(info->crtc)->msc));
293 if (msc_before(swap->msc, info->target_msc))
294 delay = msc_to_delay(info->crtc, info->target_msc);
298 DBG(("%s(event=%lldx%d, target_msc=%lld, msc=%lld, delay=%ums)\n",
300 (long long)info->target_msc, (long long)swap->msc, delay));
304 if (msc_before(swap->msc, info->target_msc)) {
306 msc = info->target_msc;
324 int delta = info->target_msc - last_msc;
328 (long long)info->target_msc,
329 (unsigned)info->target_msc,
332 assert(info->target_msc - last_msc < 1ull<<31);
337 vbl.request.sequence = info->target_msc;
383 if (tmp->target_msc == msc) {
384 DBG(("%s: vblank already queued for target_msc=%lld\n",
389 if ((int64_t)(tmp->target_msc - msc) > 0)
393 DBG(("%s: adding keepalive for target_msc=%lld\n",
402 info->target_msc = msc;
509 if (tmp->target_msc == msc) {
531 if ((int64_t)(tmp->target_msc - msc) > 0) {
532 DBG(("%s: previous target_msc=%lld invalid for coalescing\n",
533 __FUNCTION__, (long long)tmp->target_msc));
544 info->target_msc = msc;
682 uint64_t target_msc,
701 (long long)target_msc, (long long)event_id));
702 present_event_notify(event_id, gettime_ust64(), target_msc);
731 (long long)info->target_msc,
733 info->target_msc && info->target_msc == swap.msc ? "" : ": MISS"));
754 uint64_t target_msc,
774 info->target_msc = target_msc;
862 uint64_t target_msc,
873 (long long)target_msc,
909 return flip(sna, crtc, event_id, target_msc, bo);
911 return flip__async(sna, crtc, event_id, target_msc, bo);