Lines Matching defs:vbl
934 drmVBlank vbl;
939 vbl.request.type =
943 vbl.request.sequence = 1;
944 vbl.request.signal =
948 if (vbl.request.signal == 0)
952 if (drmWaitVBlank(intel->drmSubFD, &vbl)) {
953 intel_drm_abort_seq(intel->scrn, vbl.request.signal);
1095 drmVBlank vbl;
1163 vbl.request.type =
1171 vbl.request.type |= DRM_VBLANK_NEXTONMISS;
1184 vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, *target_msc);
1185 vbl.request.signal = seq;
1187 ret = drmWaitVBlank(intel->drmSubFD, &vbl);
1197 *target_msc = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence + flip);
1208 vbl.request.type =
1211 vbl.request.type |= DRM_VBLANK_NEXTONMISS;
1217 * If the calculated deadline vbl.request.sequence is smaller than
1235 vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, request_msc) - flip;
1236 vbl.request.signal = seq;
1238 ret = drmWaitVBlank(intel->drmSubFD, &vbl);
1247 *target_msc = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence + flip);
1321 drmVBlank vbl;
1369 vbl.request.type =
1371 vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, target_msc);
1372 vbl.request.signal = seq;
1374 ret = drmWaitVBlank(intel->drmSubFD, &vbl);
1388 wait_info->frame = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence);
1397 vbl.request.type =
1415 vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, request_msc);
1416 vbl.request.signal = seq;
1418 ret = drmWaitVBlank(intel->drmSubFD, &vbl);
1432 wait_info->frame = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence);