Cross Reference: /xsrc/external/mit/xf86-video-mga/dist/src/mga

Lines Matching refs:outTi3026
152 #define outTi3026(reg, mask, val) \
277 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfc );
279 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfd );
281 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfe );
285 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfe );
286 	outTi3026( TVP3026_PIX_CLK_DATA, 0, 0x00 );
289 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfc );
290 	outTi3026( TVP3026_PIX_CLK_DATA, 0, ( mclk_n & 0x3f ) | 0xc0 );
291 	outTi3026( TVP3026_PIX_CLK_DATA, 0, mclk_m & 0x3f );
292 	outTi3026( TVP3026_PIX_CLK_DATA, 0, ( mclk_p & 0x03 ) | 0xb0 );
301 	outTi3026( TVP3026_MCLK_CTL, 0, mclk_ctl & 0xe7 ); 
302 	outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x08 );
305 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfb );
306 	outTi3026( TVP3026_MEM_CLK_DATA, 0, 0x00 );
309 	outTi3026( TVP3026_PLL_ADDR, 0, 0xf3 );
310 	outTi3026( TVP3026_MEM_CLK_DATA, 0, ( mclk_n & 0x3f ) | 0xc0 );
311 	outTi3026( TVP3026_MEM_CLK_DATA, 0, mclk_m & 0x3f );
312 	outTi3026( TVP3026_MEM_CLK_DATA, 0, ( mclk_p & 0x03 ) | 0xb0 );
320 	outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x10 );
321 	outTi3026( TVP3026_MCLK_CTL, 0, ( mclk_ctl & 0xe7 ) | 0x18 );
324 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfe );
325 	outTi3026( TVP3026_PIX_CLK_DATA, 0, 0x00 );
328 	outTi3026( TVP3026_PLL_ADDR, 0, 0xfc );
329 	outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_n );
330 	outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_m );
331 	outTi3026( TVP3026_PIX_CLK_DATA, 0, pclk_p );
739 	outTi3026(TVP3026_CLK_SEL, 0, mgaReg->DacRegs[3]);
742 	outTi3026(TVP3026_PLL_ADDR, 0, 0x2A);
743 	outTi3026(TVP3026_LOAD_CLK_DATA, 0, 0);
744 	outTi3026(TVP3026_PIX_CLK_DATA, 0, 0);
761 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
763 		outTi3026(TVP3026_PIX_CLK_DATA, 0, mgaReg->DacClk[i]);
767 		outTi3026(TVP3026_PLL_ADDR, 0, 0x3F);
772 	outTi3026(TVP3026_MCLK_CTL, 0, mgaReg->DacRegs[18]);
776 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
778 		outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i]);
783 		outTi3026(TVP3026_PLL_ADDR, 0, 0x3F);
792 		outTi3026(MGADACregs[i], 0, mgaReg->DacRegs[i]);
840 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
842 		outTi3026(TVP3026_PIX_CLK_DATA, 0, mgaReg->DacClk[i] =
845 	outTi3026(TVP3026_PLL_ADDR, 0, 0x00);
847 		outTi3026(TVP3026_LOAD_CLK_DATA, 0, mgaReg->DacClk[i] =
884     outTi3026(TVP3026_CURSOR_CTL, 0xf3, 0x00); /* reset A9,A8 */
901     outTi3026(TVP3026_CURSOR_CTL, 0x6c, 0x13);
909     outTi3026(TVP3026_CURSOR_CTL, 0xfc, 0x00);
969   outTi3026(TVP3026_GEN_IO_CTL, 0xfb, 0);
1012   outTi3026(TVP3026_GEN_IO_CTL, ~(DDC_SDA_MASK | DDC_SCL_MASK), drv);
1013   outTi3026(TVP3026_GEN_IO_DATA, ~(DDC_SDA_MASK | DDC_SCL_MASK), val);