Lines Matching refs:ctrl2
201 unsigned long ctrl2, mode;
204 ctrl2 =
239 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000f9 | ctrl2);
326 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, 0x9ff000d9 | ctrl2);
404 unsigned long ctrl2, ctrl3;
406 ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
408 ctrl2 &= ~(SC1200_TVENC_OUTPUT_YCBCR | SC1200_TVENC_CFS_MASK);
414 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
420 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_SVIDEO);
427 ctrl2 | SC1200_TVENC_OUTPUT_YCBCR |
435 WRITE_VID32(SC1200_TVENC_TIM_CTRL_2, ctrl2 | SC1200_TVENC_CFS_CVBS);
444 ctrl2 = READ_VID32(SC1200_TVENC_DAC_CONTROL);
445 ctrl2 &= ~SC1200_TVENC_TRIM_MASK;
449 ctrl2 |= 0x7;
451 ctrl2 |= 0x5;
453 WRITE_VID32(SC1200_TVENC_DAC_CONTROL, ctrl2);
931 unsigned long ctrl2, ctrl3;
934 ctrl2 = READ_VID32(SC1200_TVENC_TIM_CTRL_2);
937 if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_SVIDEO)
939 else if (ctrl2 & SC1200_TVENC_OUTPUT_YCBCR)
941 else if ((ctrl2 & SC1200_TVENC_CFS_MASK) == SC1200_TVENC_CFS_CVBS) {