Lines Matching refs:pNv
34 NVPtr pNv,
40 VGA_WR08(pNv->PCIO, 0x3D4, 0x1F);
41 VGA_WR08(pNv->PCIO, 0x3D5, Lock ? 0x99 : 0x57);
43 VGA_WR08(pNv->PCIO, 0x3D4, 0x11);
44 cr11 = VGA_RD08(pNv->PCIO, 0x3D5);
47 VGA_WR08(pNv->PCIO, 0x3D5, cr11);
51 NVPtr pNv,
55 int current = pNv->CurrentState->cursor1;
57 pNv->CurrentState->cursor1 = (pNv->CurrentState->cursor1 & 0xFE) |
59 VGA_WR08(pNv->PCIO, 0x3D4, 0x31);
60 VGA_WR08(pNv->PCIO, 0x3D5, pNv->CurrentState->cursor1);
62 if(pNv->Architecture == NV_ARCH_40) { /* HW bug */
63 volatile CARD32 curpos = pNv->PRAMDAC[0x0300/4];
64 pNv->PRAMDAC[0x0300/4] = curpos;
124 static void nvGetClocks(NVPtr pNv, unsigned int *MClk, unsigned int *NVClk)
128 if(pNv->Architecture >= NV_ARCH_40) {
129 pll = pNv->PMC[0x4020/4];
131 pll = pNv->PMC[0x4024/4];
134 if(((pNv->Chipset & 0xfff0) == 0x0290) ||
135 ((pNv->Chipset & 0xfff0) == 0x0390))
143 *MClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
145 pll = pNv->PMC[0x4000/4];
147 pll = pNv->PMC[0x4004/4];
153 *NVClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
155 if(pNv->twoStagePLL) {
156 pll = pNv->PRAMDAC0[0x0504/4];
160 pll = pNv->PRAMDAC0[0x0574/4];
168 *MClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
170 pll = pNv->PRAMDAC0[0x0500/4];
174 pll = pNv->PRAMDAC0[0x0570/4];
182 *NVClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
184 if(((pNv->Chipset & 0x0ff0) == 0x0300) ||
185 ((pNv->Chipset & 0x0ff0) == 0x0330))
187 pll = pNv->PRAMDAC0[0x0504/4];
198 *MClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
200 pll = pNv->PRAMDAC0[0x0500/4];
211 *NVClk = ((N * NB * pNv->CrystalFreqKHz) / (M * MB)) >> P;
213 pll = pNv->PRAMDAC0[0x0504/4];
217 *MClk = (N * pNv->CrystalFreqKHz / M) >> P;
219 pll = pNv->PRAMDAC0[0x0500/4];
223 *NVClk = (N * pNv->CrystalFreqKHz / M) >> P;
376 NVPtr pNv
383 nvGetClocks(pNv, &MClk, &NVClk);
385 cfg1 = pNv->PFB[0x00000204/4];
389 sim_data.memory_width = (pNv->PEXTDEV[0x0000/4] & 0x10) ? 128 : 64;
603 NVPtr pNv
610 nvGetClocks(pNv, &MClk, &NVClk);
612 cfg1 = pNv->PFB[0x0204/4];
616 sim_data.memory_type = (pNv->PFB[0x0200/4] & 0x01) ? 1 : 0;
617 sim_data.memory_width = (pNv->PEXTDEV[0x0000/4] & 0x10) ? 128 : 64;
636 NVPtr pNv,
648 nvGetClocks(pNv, &MClk, &NVClk);
670 NVPtr pNv
686 if((pNv->Chipset & 0x0FF0) == 0x01A0) {
696 pll = pNv->PRAMDAC0[0x0500/4];
698 NVClk = (N * pNv->CrystalFreqKHz / M) >> P;
753 NVPtr pNv
765 if (pNv->CrystalFreqKHz == 13500) {
777 N = ((VClk << P) * M) / pNv->CrystalFreqKHz;
779 Freq = ((pNv->CrystalFreqKHz * N) / M) >> P;
800 NVPtr pNv
817 N = ((VClk << P) * M) / (pNv->CrystalFreqKHz << 2);
819 Freq = (((pNv->CrystalFreqKHz << 2) * N) / M) >> P;
840 NVPtr pNv,
861 if(pNv->twoStagePLL)
862 CalcVClock2Stage(dotClock, &VClk, &state->pll, &state->pllB, pNv);
864 CalcVClock(dotClock, &VClk, &state->pll, pNv);
866 switch (pNv->Architecture)
873 pNv);
885 if(!pNv->FlatPanel)
886 state->control = pNv->PRAMDAC0[0x0580/4] & 0xeffffeff;
892 if(((pNv->Chipset & 0xfff0) == 0x0240) ||
893 ((pNv->Chipset & 0xfff0) == 0x03D0) ||
894 ((pNv->Chipset & 0xfff0) == 0x0530))
899 if(((pNv->Chipset & 0xffff) == 0x01A0) ||
900 ((pNv->Chipset & 0xffff) == 0x01f0))
906 pNv);
907 } else if(pNv->Architecture < NV_ARCH_30) {
912 pNv);
914 nv30UpdateArbitrationSettings(pNv,
918 state->cursor0 = 0x80 | (pNv->CursorStart >> 17);
919 state->cursor1 = (pNv->CursorStart >> 11) << 2;
920 state->cursor2 = pNv->CursorStart >> 24;
924 state->config = pNv->PFB[0x00000200/4];
939 NVPtr pNv,
945 pNv->PMC[0x0140/4] = 0x00000000;
946 pNv->PMC[0x0200/4] = 0xFFFF00FF;
947 pNv->PMC[0x0200/4] = 0xFFFFFFFF;
949 pNv->PTIMER[0x0200] = 0x00000008;
950 pNv->PTIMER[0x0210] = 0x00000003;
951 pNv->PTIMER[0x0140] = 0x00000000;
952 pNv->PTIMER[0x0100] = 0xFFFFFFFF;
954 if(pNv->Architecture == NV_ARCH_04) {
956 pNv->PFB[0x0200/4] = state->config;
958 if((pNv->Architecture < NV_ARCH_40) ||
959 ((pNv->Chipset & 0xfff0) == 0x0040))
962 pNv->PFB[(0x0240 + (i * 0x10))/4] = 0;
963 pNv->PFB[(0x0244 + (i * 0x10))/4] = pNv->FbMapSize - 1;
968 if(((pNv->Chipset & 0xfff0) == 0x0090) ||
969 ((pNv->Chipset & 0xfff0) == 0x01D0) ||
970 ((pNv->Chipset & 0xfff0) == 0x0290) ||
971 ((pNv->Chipset & 0xfff0) == 0x0390) ||
972 ((pNv->Chipset & 0xfff0) == 0x03D0))
978 pNv->PFB[(0x0600 + (i * 0x10))/4] = 0;
979 pNv->PFB[(0x0604 + (i * 0x10))/4] = pNv->FbMapSize - 1;
983 if(pNv->Architecture >= NV_ARCH_40) {
984 pNv->PRAMIN[0x0000] = 0x80000010;
985 pNv->PRAMIN[0x0001] = 0x00101202;
986 pNv->PRAMIN[0x0002] = 0x80000011;
987 pNv->PRAMIN[0x0003] = 0x00101204;
988 pNv->PRAMIN[0x0004] = 0x80000012;
989 pNv->PRAMIN[0x0005] = 0x00101206;
990 pNv->PRAMIN[0x0006] = 0x80000013;
991 pNv->PRAMIN[0x0007] = 0x00101208;
992 pNv->PRAMIN[0x0008] = 0x80000014;
993 pNv->PRAMIN[0x0009] = 0x0010120A;
994 pNv->PRAMIN[0x000A] = 0x80000015;
995 pNv->PRAMIN[0x000B] = 0x0010120C;
996 pNv->PRAMIN[0x000C] = 0x80000016;
997 pNv->PRAMIN[0x000D] = 0x0010120E;
998 pNv->PRAMIN[0x000E] = 0x80000017;
999 pNv->PRAMIN[0x000F] = 0x00101210;
1000 pNv->PRAMIN[0x0800] = 0x00003000;
1001 pNv->PRAMIN[0x0801] = pNv->FbMapSize - 1;
1002 pNv->PRAMIN[0x0802] = 0x00000002;
1003 pNv->PRAMIN[0x0808] = 0x02080062;
1004 pNv->PRAMIN[0x0809] = 0x00000000;
1005 pNv->PRAMIN[0x080A] = 0x00001200;
1006 pNv->PRAMIN[0x080B] = 0x00001200;
1007 pNv->PRAMIN[0x080C] = 0x00000000;
1008 pNv->PRAMIN[0x080D] = 0x00000000;
1009 pNv->PRAMIN[0x0810] = 0x02080043;
1010 pNv->PRAMIN[0x0811] = 0x00000000;
1011 pNv->PRAMIN[0x0812] = 0x00000000;
1012 pNv->PRAMIN[0x0813] = 0x00000000;
1013 pNv->PRAMIN[0x0814] = 0x00000000;
1014 pNv->PRAMIN[0x0815] = 0x00000000;
1015 pNv->PRAMIN[0x0818] = 0x02080044;
1016 pNv->PRAMIN[0x0819] = 0x02000000;
1017 pNv->PRAMIN[0x081A] = 0x00000000;
1018 pNv->PRAMIN[0x081B] = 0x00000000;
1019 pNv->PRAMIN[0x081C] = 0x00000000;
1020 pNv->PRAMIN[0x081D] = 0x00000000;
1021 pNv->PRAMIN[0x0820] = 0x02080019;
1022 pNv->PRAMIN[0x0821] = 0x00000000;
1023 pNv->PRAMIN[0x0822] = 0x00000000;
1024 pNv->PRAMIN[0x0823] = 0x00000000;
1025 pNv->PRAMIN[0x0824] = 0x00000000;
1026 pNv->PRAMIN[0x0825] = 0x00000000;
1027 pNv->PRAMIN[0x0828] = 0x020A005C;
1028 pNv->PRAMIN[0x0829] = 0x00000000;
1029 pNv->PRAMIN[0x082A] = 0x00000000;
1030 pNv->PRAMIN[0x082B] = 0x00000000;
1031 pNv->PRAMIN[0x082C] = 0x00000000;
1032 pNv->PRAMIN[0x082D] = 0x00000000;
1033 pNv->PRAMIN[0x0830] = 0x0208009F;
1034 pNv->PRAMIN[0x0831] = 0x00000000;
1035 pNv->PRAMIN[0x0832] = 0x00001200;
1036 pNv->PRAMIN[0x0833] = 0x00001200;
1037 pNv->PRAMIN[0x0834] = 0x00000000;
1038 pNv->PRAMIN[0x0835] = 0x00000000;
1039 pNv->PRAMIN[0x0838] = 0x0208004A;
1040 pNv->PRAMIN[0x0839] = 0x02000000;
1041 pNv->PRAMIN[0x083A] = 0x00000000;
1042 pNv->PRAMIN[0x083B] = 0x00000000;
1043 pNv->PRAMIN[0x083C] = 0x00000000;
1044 pNv->PRAMIN[0x083D] = 0x00000000;
1045 pNv->PRAMIN[0x0840] = 0x02080077;
1046 pNv->PRAMIN[0x0841] = 0x00000000;
1047 pNv->PRAMIN[0x0842] = 0x00001200;
1048 pNv->PRAMIN[0x0843] = 0x00001200;
1049 pNv->PRAMIN[0x0844] = 0x00000000;
1050 pNv->PRAMIN[0x0845] = 0x00000000;
1051 pNv->PRAMIN[0x084C] = 0x00003002;
1052 pNv->PRAMIN[0x084D] = 0x00007FFF;
1053 pNv->PRAMIN[0x084E] = pNv->FbUsableSize | 0x00000002;
1056 pNv->PRAMIN[0x080A] |= 0x01000000;
1057 pNv->PRAMIN[0x0812] |= 0x01000000;
1058 pNv->PRAMIN[0x081A] |= 0x01000000;
1059 pNv->PRAMIN[0x0822] |= 0x01000000;
1060 pNv->PRAMIN[0x082A] |= 0x01000000;
1061 pNv->PRAMIN[0x0832] |= 0x01000000;
1062 pNv->PRAMIN[0x083A] |= 0x01000000;
1063 pNv->PRAMIN[0x0842] |= 0x01000000;
1064 pNv->PRAMIN[0x0819] = 0x01000000;
1065 pNv->PRAMIN[0x0839] = 0x01000000;
1068 pNv->PRAMIN[0x0000] = 0x80000010;
1069 pNv->PRAMIN[0x0001] = 0x80011201;
1070 pNv
1071 pNv->PRAMIN[0x0003] = 0x80011202;
1072 pNv->PRAMIN[0x0004] = 0x80000012;
1073 pNv->PRAMIN[0x0005] = 0x80011203;
1074 pNv->PRAMIN[0x0006] = 0x80000013;
1075 pNv->PRAMIN[0x0007] = 0x80011204;
1076 pNv->PRAMIN[0x0008] = 0x80000014;
1077 pNv->PRAMIN[0x0009] = 0x80011205;
1078 pNv->PRAMIN[0x000A] = 0x80000015;
1079 pNv->PRAMIN[0x000B] = 0x80011206;
1080 pNv->PRAMIN[0x000C] = 0x80000016;
1081 pNv->PRAMIN[0x000D] = 0x80011207;
1082 pNv->PRAMIN[0x000E] = 0x80000017;
1083 pNv->PRAMIN[0x000F] = 0x80011208;
1084 pNv->PRAMIN[0x0800] = 0x00003000;
1085 pNv->PRAMIN[0x0801] = pNv->FbMapSize - 1;
1086 pNv->PRAMIN[0x0802] = 0x00000002;
1087 pNv->PRAMIN[0x0803] = 0x00000002;
1088 if(pNv->Architecture >= NV_ARCH_10)
1089 pNv->PRAMIN[0x0804] = 0x01008062;
1091 pNv->PRAMIN[0x0804] = 0x01008042;
1092 pNv->PRAMIN[0x0805] = 0x00000000;
1093 pNv->PRAMIN[0x0806] = 0x12001200;
1094 pNv->PRAMIN[0x0807] = 0x00000000;
1095 pNv->PRAMIN[0x0808] = 0x01008043;
1096 pNv->PRAMIN[0x0809] = 0x00000000;
1097 pNv->PRAMIN[0x080A] = 0x00000000;
1098 pNv->PRAMIN[0x080B] = 0x00000000;
1099 pNv->PRAMIN[0x080C] = 0x01008044;
1100 pNv->PRAMIN[0x080D] = 0x00000002;
1101 pNv->PRAMIN[0x080E] = 0x00000000;
1102 pNv->PRAMIN[0x080F] = 0x00000000;
1103 pNv->PRAMIN[0x0810] = 0x01008019;
1104 pNv->PRAMIN[0x0811] = 0x00000000;
1105 pNv->PRAMIN[0x0812] = 0x00000000;
1106 pNv->PRAMIN[0x0813] = 0x00000000;
1107 pNv->PRAMIN[0x0814] = 0x0100A05C;
1108 pNv->PRAMIN[0x0815] = 0x00000000;
1109 pNv->PRAMIN[0x0816] = 0x00000000;
1110 pNv->PRAMIN[0x0817] = 0x00000000;
1111 if(pNv->WaitVSyncPossible)
1112 pNv->PRAMIN[0x0818] = 0x0100809F;
1114 pNv->PRAMIN[0x0818] = 0x0100805F;
1115 pNv->PRAMIN[0x0819] = 0x00000000;
1116 pNv->PRAMIN[0x081A] = 0x12001200;
1117 pNv->PRAMIN[0x081B] = 0x00000000;
1118 pNv->PRAMIN[0x081C] = 0x0100804A;
1119 pNv->PRAMIN[0x081D] = 0x00000002;
1120 pNv->PRAMIN[0x081E] = 0x00000000;
1121 pNv->PRAMIN[0x081F] = 0x00000000;
1122 pNv->PRAMIN[0x0820] = 0x01018077;
1123 pNv->PRAMIN[0x0821] = 0x00000000;
1124 pNv->PRAMIN[0x0822] = 0x12001200;
1125 pNv->PRAMIN[0x0823] = 0x00000000;
1126 pNv->PRAMIN[0x0824] = 0x00003002;
1127 pNv->PRAMIN[0x0825] = 0x00007FFF;
1128 pNv->PRAMIN[0x0826] = pNv->FbUsableSize | 0x00000002;
1129 pNv->PRAMIN[0x0827] = 0x00000002;
1132 pNv->PRAMIN[0x0804] |= 0x00080000;
1133 pNv->PRAMIN[0x0808] |= 0x00080000;
1134 pNv->PRAMIN[0x080C] |= 0x00080000;
1135 pNv->PRAMIN[0x0810] |= 0x00080000;
1136 pNv->PRAMIN[0x0814] |= 0x00080000;
1137 pNv->PRAMIN[0x0818] |= 0x00080000;
1138 pNv->PRAMIN[0x081C] |= 0x00080000;
1139 pNv->PRAMIN[0x0820] |= 0x00080000;
1140 pNv->PRAMIN[0x080D] = 0x00000001;
1141 pNv->PRAMIN[0x081D] = 0x00000001;
1145 if(pNv->Architecture < NV_ARCH_10) {
1146 if((pNv->Chipset & 0x0fff) == 0x0020) {
1147 pNv->PRAMIN[0x0824] |= 0x00020000;
1148 pNv->PRAMIN[0x0826] += pNv->FbAddress;
1150 pNv->PGRAPH[0x0080/4] = 0x000001FF;
1151 pNv->PGRAPH[0x0080/4] = 0x1230C000;
1152 pNv->PGRAPH[0x0084/4] = 0x72111101;
1153 pNv->PGRAPH[0x0088/4] = 0x11D5F071;
1154 pNv->PGRAPH[0x008C/4] = 0x0004FF31;
1155 pNv->PGRAPH[0x008C/4] = 0x4004FF31;
1157 pNv->PGRAPH[0x0140/4] = 0x00000000;
1158 pNv->PGRAPH[0x0100/4] = 0xFFFFFFFF;
1159 pNv->PGRAPH[0x0170/4] = 0x10010100;
1160 pNv->PGRAPH[0x0710/4] = 0xFFFFFFFF;
1161 pNv->PGRAPH[0x0720/4] = 0x00000001;
1163 pNv->PGRAPH[0x0810/4] = 0x00000000;
1164 pNv->PGRAPH[0x0608/4] = 0xFFFFFFFF;
1166 pNv->PGRAPH[0x0080/4] = 0xFFFFFFFF;
1167 pNv->PGRAPH[0x0080/4] = 0x00000000;
1169 pNv->PGRAPH[0x0140/4] = 0x00000000;
1170 pNv->PGRAPH[0x0100/4] = 0xFFFFFFFF;
1171 pNv->PGRAPH[0x0144/4] = 0x10010100;
1172 pNv->PGRAPH[0x0714/4] = 0xFFFFFFFF;
1173 pNv->PGRAPH[0x0720/4] = 0x00000001;
1174 pNv->PGRAPH[0x0710/4] &= 0x0007ff00;
1175 pNv->PGRAPH[0x0710/4] |= 0x00020100;
1177 if(pNv->Architecture == NV_ARCH_10) {
1178 pNv->PGRAPH[0x0084/4] = 0x00118700;
1179 pNv->PGRAPH[0x0088/4] = 0x24E00810;
1180 pNv->PGRAPH[0x008C/4] = 0x55DE0030;
1183 pNv->PGRAPH[(0x0B00/4) + i] = pNv->PFB[(0x0240/4) + i];
1185 pNv->PGRAPH[0x640/4] = 0;
1186 pNv->PGRAPH[0x644/4] = 0;
1187 pNv->PGRAPH[0x684/4] = pNv->FbMapSize - 1;
1188 pNv->PGRAPH[0x688/4] = pNv->FbMapSize - 1;
1190 pNv->PGRAPH[0x0810/4] = 0x00000000;
1191 pNv->PGRAPH[0x0608/4] = 0xFFFFFFFF;
1193 if(pNv->Architecture >= NV_ARCH_40) {
1194 pNv->PGRAPH[0x0084/4] = 0x401287c0;
1195 pNv->PGRAPH[0x008C/4] = 0x60de8051;
1196 pNv->PGRAPH[0x0090/4] = 0x00008000;
1197 pNv->PGRAPH[0x0610/4] = 0x00be3c5f;
1198 pNv->PGRAPH[0x0bc4/4] |= 0x00008000;
1200 j = pNv->REGS[0x1540/4] & 0xff;
1203 pNv->PGRAPH[0x5000/4] = i;
1206 if((pNv->Chipset & 0xfff0) == 0x0040) {
1207 pNv->PGRAPH[0x09b0/4] = 0x83280fff;
1208 pNv->PGRAPH[0x09b4/4] = 0x000000a0;
1210 pNv->PGRAPH[0x0820/4] = 0x83280eff;
1211 pNv->PGRAPH[0x0824/4] = 0x000000a0;
1214 switch(pNv->Chipset & 0xfff0) {
1217 pNv->PGRAPH[0x09b8/4] = 0x0078e366;
1218 pNv->PGRAPH[0x09bc/4] = 0x0000014c;
1219 pNv->PFB[0x033C/4] &= 0xffff7fff;
1223 pNv->PGRAPH[0x0828/4] = 0x007596ff;
1224 pNv->PGRAPH[0x082C/4] = 0x00000108;
1231 pNv->PMC[0x1700/4] = pNv->PFB[0x020C/4];
1232 pNv->PMC[0x1704/4] = 0;
1233 pNv->PMC[0x1708/4] = 0;
1234 pNv->PMC[0x170C/4] = pNv->PFB[0x020C/4];
1235 pNv->PGRAPH[0x0860/4] = 0;
1236 pNv->PGRAPH[0x0864/4] = 0;
1237 pNv->PRAMDAC[0x0608/4] |= 0x00100000;
1240 pNv->PGRAPH[0x0828/4] = 0x0072cb77;
1241 pNv->PGRAPH[0x082C/4] = 0x00000108;
1244 pNv->PGRAPH[0x0860/4] = 0;
1245 pNv->PGRAPH[0x0864/4] = 0;
1246 pNv->PRAMDAC[0x0608/4] |= 0x00100000;
1251 pNv->PRAMDAC[0x0608/4] |= 0x00100000;
1252 pNv->PGRAPH[0x0828/4] = 0x07830610;
1253 pNv->PGRAPH[0x082C/4] = 0x0000016A;
1259 pNv->PGRAPH[0x0b38/4] = 0x2ffff800;
1260 pNv->PGRAPH[0x0b3c/4] = 0x00006000;
1261 pNv->PGRAPH[0x032C/4] = 0x01000000;
1262 pNv->PGRAPH[0x0220/4] = 0x00001200;
1264 if(pNv->Architecture == NV_ARCH_30) {
1265 pNv->PGRAPH[0x0084/4] = 0x40108700;
1266 pNv->PGRAPH[0x0890/4] = 0x00140000;
1267 pNv->PGRAPH[0x008C/4] = 0xf00e0431;
1268 pNv->PGRAPH[0x0090/4] = 0x00008000;
1269 pNv->PGRAPH[0x0610/4] = 0xf04b1f36;
1270 pNv->PGRAPH[0x0B80/4] = 0x1002d888;
1271 pNv->PGRAPH[0x0B88/4] = 0x62ff007f;
1273 pNv->PGRAPH[0x0084/4] = 0x00118700;
1274 pNv->PGRAPH[0x008C/4] = 0xF20E0431;
1275 pNv->PGRAPH[0x0090/4] = 0x00000000;
1276 pNv->PGRAPH[0x009C/4] = 0x00000040;
1278 if((pNv->Chipset & 0x0ff0) >= 0x0250) {
1279 pNv->PGRAPH[0x0890/4] = 0x00080000;
1280 pNv->PGRAPH[0x0610/4] = 0x304B1FB6;
1281 pNv->PGRAPH[0x0B80/4] = 0x18B82880;
1282 pNv->PGRAPH[0x0B84/4] = 0x44000000;
1283 pNv->PGRAPH[0x0098/4] = 0x40000080;
1284 pNv->PGRAPH[0x0B88/4] = 0x000000ff;
1286 pNv->PGRAPH[0x0880/4] = 0x00080000;
1287 pNv->PGRAPH[0x0094/4] = 0x00000005;
1288 pNv->PGRAPH[0x0B80/4] = 0x45CAA208;
1289 pNv->PGRAPH[0x0B84/4] = 0x24000000;
1290 pNv->PGRAPH[0x0098/4] = 0x00000040;
1291 pNv->PGRAPH[0x0750/4] = 0x00E00038;
1292 pNv->PGRAPH[0x0754/4] = 0x00000030;
1293 pNv->PGRAPH[0x0750/4] = 0x00E10038;
1294 pNv->PGRAPH[0x0754/4] = 0x00000030;
1298 if((pNv->Architecture < NV_ARCH_40) ||
1299 ((pNv->Chipset & 0xfff0) == 0x0040))
1302 pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0240/4) + i];
1303 pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0240/4) + i];
1306 if(((pNv->Chipset & 0xfff0) == 0x0090) ||
1307 ((pNv->Chipset & 0xfff0) == 0x01D0) ||
1308 ((pNv->Chipset & 0xfff0) == 0x0290) ||
1309 ((pNv->Chipset & 0xfff0) == 0x0390) ||
1310 ((pNv->Chipset & 0xfff0) == 0x03D0))
1313 pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i];
1314 pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0600/4) + i];
1318 pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0600/4) + i];
1319 if(((pNv->Chipset & 0xfff0) != 0x0160) &&
1320 ((pNv->Chipset & 0xfff0) != 0x0220) &&
1321 ((pNv->Chipset & 0xfff0) != 0x0240) &&
1322 ((pNv->Chipset & 0xfff0) != 0x0530))
1324 pNv->PGRAPH[(0x6900/4) + i] = pNv->PFB[(0x0600/4) + i];
1330 if(pNv->Architecture >= NV_ARCH_40) {
1331 if((pNv->Chipset & 0xfff0) == 0x0040) {
1332 pNv->PGRAPH[0x09A4/4] = pNv->PFB[0x0200/4];
1333 pNv->PGRAPH[0x09A8/4] = pNv->PFB[0x0204/4];
1334 pNv->PGRAPH[0x69A4/4] = pNv->PFB[0x0200/4];
1335 pNv->PGRAPH[0x69A8/4] = pNv->PFB[0x0204/4];
1337 pNv->PGRAPH[0x0820/4] = 0;
1338 pNv->PGRAPH[0x0824/4] = 0;
1339 pNv->PGRAPH[0x0864/4] = pNv->FbMapSize - 1;
1340 pNv->PGRAPH[0x0868/4] = pNv->FbMapSize - 1;
1342 if(((pNv->Chipset & 0xfff0) == 0x0090) ||
1343 ((pNv->Chipset & 0xfff0) == 0x01D0) ||
1344 ((pNv->Chipset & 0xfff0) == 0x0290) ||
1345 ((pNv->Chipset & 0xfff0) == 0x0390))
1347 pNv->PGRAPH[0x0DF0/4] = pNv->PFB[0x0200/4];
1348 pNv->PGRAPH[0x0DF4/4] = pNv->PFB[0x0204/4];
1350 pNv->PGRAPH[0x09F0/4] = pNv->PFB[0x0200/4];
1351 pNv->PGRAPH[0x09F4/4] = pNv->PFB[0x0204/4];
1353 pNv->PGRAPH[0x69F0/4] = pNv->PFB[0x0200/4];
1354 pNv->PGRAPH[0x69F4/4] = pNv->PFB[0x0204/4];
1356 pNv->PGRAPH[0x0840/4] = 0;
1357 pNv->PGRAPH[0x0844/4] = 0;
1358 pNv->PGRAPH[0x08a0/4] = pNv->FbMapSize - 1;
1359 pNv->PGRAPH[0x08a4/4] = pNv->FbMapSize - 1;
1362 pNv->PGRAPH[0x09A4/4] = pNv->PFB[0x0200/4];
1363 pNv->PGRAPH[0x09A8/4] = pNv->PFB[0x0204/4];
1364 pNv->PGRAPH[0x0750/4] = 0x00EA0000;
1365 pNv->PGRAPH[0x0754/4] = pNv->PFB[0x0200/4];
1366 pNv->PGRAPH[0x0750/4] = 0x00EA0004;
1367 pNv->PGRAPH[0x0754/4] = pNv->PFB[0x0204/4];
1369 pNv->PGRAPH[0x0820/4] = 0;
1370 pNv->PGRAPH[0x0824/4] = 0;
1371 pNv->PGRAPH[0x0864/4] = pNv->FbMapSize - 1;
1372 pNv->PGRAPH[0x0868/4] = pNv->FbMapSize - 1;
1375 pNv->PGRAPH[0x0B20/4] = 0x00000000;
1376 pNv->PGRAPH[0x0B04/4] = 0xFFFFFFFF;
1379 pNv->PGRAPH[0x053C/4] = 0;
1380 pNv->PGRAPH[0x0540/4] = 0;
1381 pNv->PGRAPH[0x0544/4] = 0x00007FFF;
1382 pNv->PGRAPH[0x0548/4] = 0x00007FFF;
1384 pNv->PFIFO[0x0140] = 0x00000000;
1385 pNv->PFIFO[0x0141] = 0x00000001;
1386 pNv->PFIFO[0x0480] = 0x00000000;
1387 pNv->PFIFO[0x0494] = 0x00000000;
1388 if(pNv->Architecture >= NV_ARCH_40)
1389 pNv->PFIFO[0x0481] = 0x00010000;
1391 pNv->PFIFO[0x0481] = 0x00000100;
1392 pNv->PFIFO[0x0490] = 0x00000000;
1393 pNv->PFIFO[0x0491] = 0x00000000;
1394 if(pNv->Architecture >= NV_ARCH_40)
1395 pNv->PFIFO[0x048B] = 0x00001213;
1397 pNv->PFIFO[0x048B] = 0x00001209;
1398 pNv->PFIFO[0x0400] = 0x00000000;
1399 pNv->PFIFO[0x0414] = 0x00000000;
1400 pNv->PFIFO[0x0084] = 0x03000100;
1401 pNv->PFIFO[0x0085] = 0x00000110;
1402 pNv->PFIFO[0x0086] = 0x00000112;
1403 pNv->PFIFO[0x0143] = 0x0000FFFF;
1404 pNv->PFIFO[0x0496] = 0x0000FFFF;
1405 pNv->PFIFO[0x0050] = 0x00000000;
1406 pNv->PFIFO[0x0040] = 0xFFFFFFFF;
1407 pNv->PFIFO[0x0415] = 0x00000001;
1408 pNv->PFIFO[0x048C] = 0x00000000;
1409 pNv->PFIFO[0x04A0] = 0x00000000;
1411 pNv->PFIFO[0x0489] = 0x800F0078;
1413 pNv->PFIFO[0x0489] = 0x000F0078;
1415 pNv->PFIFO[0x0488] = 0x00000001;
1416 pNv->PFIFO[0x0480] = 0x00000001;
1417 pNv->PFIFO[0x0494] = 0x00000001;
1418 pNv->PFIFO[0x0495] = 0x00000001;
1419 pNv->PFIFO[0x0140] = 0x00000001;
1422 pNv->CurrentState = NULL;
1426 if(pNv->Architecture >= NV_ARCH_10) {
1427 if(pNv->twoHeads) {
1428 pNv->PCRTC0[0x0860/4] = state->head;
1429 pNv->PCRTC0[0x2860/4] = state->head2;
1431 pNv->PRAMDAC[0x0404/4] |= (1 << 25);
1433 pNv->PMC[0x8704/4] = 1;
1434 pNv->PMC[0x8140/4] = 0;
1435 pNv->PMC[0x8920/4] = 0;
1436 pNv->PMC[0x8924/4] = 0;
1437 pNv->PMC[0x8908/4] = pNv->FbMapSize - 1;
1438 pNv->PMC[0x890C/4] = pNv->FbMapSize - 1;
1439 pNv->PMC[0x1588/4] = 0;
1441 pNv->PCRTC[0x0810/4] = state->cursorConfig;
1442 pNv->PCRTC[0x0830/4] = state->displayV - 3;
1443 pNv->PCRTC[0x0834/4] = state->displayV - 1;
1445 if(pNv->FlatPanel) {
1446 if((pNv->Chipset & 0x0ff0) == 0x0110) {
1447 pNv->PRAMDAC[0x0528/4] = state->dither;
1449 if(pNv->twoHeads) {
1450 pNv->PRAMDAC[0x083C/4] = state->dither;
1453 VGA_WR08(pNv->PCIO, 0x03D4, 0x53);
1454 VGA_WR08(pNv->PCIO, 0x03D5, state->timingH);
1455 VGA_WR08(pNv->PCIO, 0x03D4, 0x54);
1456 VGA_WR08(pNv->PCIO, 0x03D5, state->timingV);
1457 VGA_WR08(pNv->PCIO, 0x03D4, 0x21);
1458 VGA_WR08(pNv->PCIO, 0x03D5, 0xfa);
1461 VGA_WR08(pNv->PCIO, 0x03D4, 0x41);
1462 VGA_WR08(pNv->PCIO, 0x03D5, state->extra);
1465 VGA_WR08(pNv->PCIO, 0x03D4, 0x19);
1466 VGA_WR08(pNv->PCIO, 0x03D5, state->repaint0);
1467 VGA_WR08(pNv->PCIO, 0x03D4, 0x1A);
1468 VGA_WR08(pNv->PCIO, 0x03D5, state->repaint1);
1469 VGA_WR08(pNv->PCIO, 0x03D4, 0x25);
1470 VGA_WR08(pNv->PCIO, 0x03D5, state->screen);
1471 VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
1472 VGA_WR08(pNv->PCIO, 0x03D5, state->pixel);
1473 VGA_WR08(pNv->PCIO, 0x03D4, 0x2D);
1474 VGA_WR08(pNv->PCIO, 0x03D5, state->horiz);
1475 VGA_WR08(pNv->PCIO, 0x03D4, 0x1C);
1476 VGA_WR08(pNv->PCIO, 0x03D5, state->fifo);
1477 VGA_WR08(pNv->PCIO, 0x03D4, 0x1B);
1478 VGA_WR08(pNv->PCIO, 0x03D5, state->arbitration0);
1479 VGA_WR08(pNv->PCIO, 0x03D4, 0x20);
1480 VGA_WR08(pNv->PCIO, 0x03D5, state->arbitration1);
1481 if(pNv->Architecture >= NV_ARCH_30) {
1482 VGA_WR08(pNv->PCIO, 0x03D4, 0x47);
1483 VGA_WR08(pNv->PCIO, 0x03D5, state->arbitration1 >> 8);
1485 VGA_WR08(pNv->PCIO, 0x03D4, 0x30);
1486 VGA_WR08(pNv->PCIO, 0x03D5, state->cursor0);
1487 VGA_WR08(pNv->PCIO, 0x03D4, 0x31);
1488 VGA_WR08(pNv->PCIO, 0x03D5, state->cursor1);
1489 VGA_WR08(pNv->PCIO, 0x03D4, 0x2F);
1490 VGA_WR08(pNv->PCIO, 0x03D5, state->cursor2);
1491 VGA_WR08(pNv->PCIO, 0x03D4, 0x39);
1492 VGA_WR08(pNv->PCIO, 0x03D5, state->interlace);
1494 if(!pNv->FlatPanel) {
1495 if(pNv
1496 pNv->PRAMDAC0[0x0580/4] = state->control;
1499 pNv->PRAMDAC0[0x050C/4] = state->pllsel;
1500 pNv->PRAMDAC0[0x0508/4] = state->vpll;
1501 if(pNv->twoHeads)
1502 pNv->PRAMDAC0[0x0520/4] = state->vpll2;
1503 if(pNv->twoStagePLL) {
1504 pNv->PRAMDAC0[0x0578/4] = state->vpllB;
1505 pNv->PRAMDAC0[0x057C/4] = state->vpll2B;
1508 pNv->PRAMDAC[0x0848/4] = state->scale;
1509 pNv->PRAMDAC[0x0828/4] = state->crtcSync;
1510 pNv->PRAMDAC[0x0808/4] = state->crtcVSync;
1512 pNv->PRAMDAC[0x0600/4] = state->general;
1514 pNv->PCRTC[0x0140/4] = 0;
1515 pNv->PCRTC[0x0100/4] = 1;
1517 pNv->CurrentState = state;
1522 NVPtr pNv,
1526 VGA_WR08(pNv->PCIO, 0x03D4, 0x19);
1527 state->repaint0 = VGA_RD08(pNv->PCIO, 0x03D5);
1528 VGA_WR08(pNv->PCIO, 0x03D4, 0x1A);
1529 state->repaint1 = VGA_RD08(pNv->PCIO, 0x03D5);
1530 VGA_WR08(pNv->PCIO, 0x03D4, 0x25);
1531 state->screen = VGA_RD08(pNv->PCIO, 0x03D5);
1532 VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
1533 state->pixel = VGA_RD08(pNv->PCIO, 0x03D5);
1534 VGA_WR08(pNv->PCIO, 0x03D4, 0x2D);
1535 state->horiz = VGA_RD08(pNv->PCIO, 0x03D5);
1536 VGA_WR08(pNv->PCIO, 0x03D4, 0x1C);
1537 state->fifo = VGA_RD08(pNv->PCIO, 0x03D5);
1538 VGA_WR08(pNv->PCIO, 0x03D4, 0x1B);
1539 state->arbitration0 = VGA_RD08(pNv->PCIO, 0x03D5);
1540 VGA_WR08(pNv->PCIO, 0x03D4, 0x20);
1541 state->arbitration1 = VGA_RD08(pNv->PCIO, 0x03D5);
1542 if(pNv->Architecture >= NV_ARCH_30) {
1543 VGA_WR08(pNv->PCIO, 0x03D4, 0x47);
1544 state->arbitration1 |= (VGA_RD08(pNv->PCIO, 0x03D5) & 1) << 8;
1546 VGA_WR08(pNv->PCIO, 0x03D4, 0x30);
1547 state->cursor0 = VGA_RD08(pNv->PCIO, 0x03D5);
1548 VGA_WR08(pNv->PCIO, 0x03D4, 0x31);
1549 state->cursor1 = VGA_RD08(pNv->PCIO, 0x03D5);
1550 VGA_WR08(pNv->PCIO, 0x03D4, 0x2F);
1551 state->cursor2 = VGA_RD08(pNv->PCIO, 0x03D5);
1552 VGA_WR08(pNv->PCIO, 0x03D4, 0x39);
1553 state->interlace = VGA_RD08(pNv->PCIO, 0x03D5);
1554 state->vpll = pNv->PRAMDAC0[0x0508/4];
1555 if(pNv->twoHeads)
1556 state->vpll2 = pNv->PRAMDAC0[0x0520/4];
1557 if(pNv->twoStagePLL) {
1558 state->vpllB = pNv->PRAMDAC0[0x0578/4];
1559 state->vpll2B = pNv->PRAMDAC0[0x057C/4];
1561 state->pllsel = pNv->PRAMDAC0[0x050C/4];
1562 state->general = pNv->PRAMDAC[0x0600/4];
1563 state->scale = pNv->PRAMDAC[0x0848/4];
1564 state->config = pNv->PFB[0x0200/4];
1566 if(pNv->Architecture >= NV_ARCH_40 && !pNv->FlatPanel) {
1567 state->control = pNv->PRAMDAC0[0x0580/4];
1570 if(pNv->Architecture >= NV_ARCH_10) {
1571 if(pNv->twoHeads) {
1572 state->head = pNv->PCRTC0[0x0860/4];
1573 state->head2 = pNv->PCRTC0[0x2860/4];
1574 VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
1575 state->crtcOwner = VGA_RD08(pNv->PCIO, 0x03D5);
1577 VGA_WR08(pNv->PCIO, 0x03D4, 0x41);
1578 state->extra = VGA_RD08(pNv->PCIO, 0x03D5);
1579 state->cursorConfig = pNv->PCRTC[0x0810/4];
1581 if((pNv->Chipset & 0x0ff0) == 0x0110) {
1582 state->dither = pNv->PRAMDAC[0x0528/4];
1584 if(pNv->twoHeads) {
1585 state->dither = pNv->PRAMDAC[0x083C/4];
1588 if(pNv->FlatPanel) {
1589 VGA_WR08(pNv->PCIO, 0x03D4, 0x53);
1590 state->timingH = VGA_RD08(pNv->PCIO, 0x03D5);
1591 VGA_WR08(pNv->PCIO, 0x03D4, 0x54);
1592 state->timingV = VGA_RD08(pNv->PCIO, 0x03D5);
1596 if(pNv->FlatPanel) {
1597 state->crtcSync = pNv->PRAMDAC[0x0828/4];
1598 state->crtcVSync = pNv->PRAMDAC[0x0808/4];
1603 NVPtr pNv,
1607 if (pNv->VBEDualhead) {
1608 pNv->PCRTC0[0x800/4] = start;
1609 pNv->PCRTC0[0x2800/4] = start + pNv->vbeCRTC1Offset;
1611 pNv->PCRTC[0x800/4] = start;
Indexes created Fri Jul 31 00:23:59 UTC 2026