Lines Matching refs:pNv
43 NVPtr pNv = (NVPtr)pVga->MMIOBase;
44 VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
45 VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET, value);
49 NVPtr pNv = (NVPtr)pVga->MMIOBase;
50 VGA_WR08(pNv->PCIO, pVga->IOBase + VGA_CRTC_INDEX_OFFSET, index);
51 return (VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_CRTC_DATA_OFFSET));
55 NVPtr pNv = (NVPtr)pVga->MMIOBase;
56 VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index);
57 VGA_WR08(pNv->PVIO, VGA_GRAPH_DATA, value);
61 NVPtr pNv = (NVPtr)pVga->MMIOBase;
62 VGA_WR08(pNv->PVIO, VGA_GRAPH_INDEX, index);
63 return (VGA_RD08(pNv->PVIO, VGA_GRAPH_DATA));
67 NVPtr pNv = (NVPtr)pVga->MMIOBase;
68 VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index);
69 VGA_WR08(pNv->PVIO, VGA_SEQ_DATA, value);
73 NVPtr pNv = (NVPtr)pVga->MMIOBase;
74 VGA_WR08(pNv->PVIO, VGA_SEQ_INDEX, index);
75 return (VGA_RD08(pNv->PVIO, VGA_SEQ_DATA));
79 NVPtr pNv = (NVPtr)pVga->MMIOBase;
82 tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
87 VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index);
88 VGA_WR08(pNv->PCIO, VGA_ATTR_DATA_W, value);
92 NVPtr pNv = (NVPtr)pVga->MMIOBase;
95 tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
100 VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, index);
101 return (VGA_RD08(pNv->PCIO, VGA_ATTR_DATA_R));
105 NVPtr pNv = (NVPtr)pVga->MMIOBase;
106 VGA_WR08(pNv->PVIO, VGA_MISC_OUT_W, value);
110 NVPtr pNv = (NVPtr)pVga->MMIOBase;
111 return (VGA_RD08(pNv->PVIO, VGA_MISC_OUT_R));
115 NVPtr pNv = (NVPtr)pVga->MMIOBase;
118 tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
119 VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x00);
124 NVPtr pNv = (NVPtr)pVga->MMIOBase;
127 tmp = VGA_RD08(pNv->PCIO, pVga->IOBase + VGA_IN_STAT_1_OFFSET);
128 VGA_WR08(pNv->PCIO, VGA_ATTR_INDEX, 0x20);
133 NVPtr pNv = (NVPtr)pVga->MMIOBase;
134 VGA_WR08(pNv->PDIO, VGA_DAC_MASK, value);
138 NVPtr pNv = (NVPtr)pVga->MMIOBase;
139 return (VGA_RD08(pNv->PDIO, VGA_DAC_MASK));
143 NVPtr pNv = (NVPtr)pVga->MMIOBase;
144 VGA_WR08(pNv->PDIO, VGA_DAC_READ_ADDR, value);
148 NVPtr pNv = (NVPtr)pVga->MMIOBase;
149 VGA_WR08(pNv->PDIO, VGA_DAC_WRITE_ADDR, value);
153 NVPtr pNv = (NVPtr)pVga->MMIOBase;
154 VGA_WR08(pNv->PDIO, VGA_DAC_DATA, value);
158 NVPtr pNv = (NVPtr)pVga->MMIOBase;
159 return (VGA_RD08(pNv->PDIO, VGA_DAC_DATA));
165 NVPtr pNv = NVPTR(pScrn);
166 volatile U032 *PRAMDAC = pNv->PRAMDAC0;
188 pNv->PRAMDAC0[0x0610/4] = 0x94050140;
189 pNv->PRAMDAC0[0x0608/4] |= 0x00001000;
201 pNv->PRAMDAC0[0x0608/4] = dac0_reg608;
212 NVPtr pNv = NVPTR(pScrn);
215 pNv->PCIO = pNv->PCIO0 + 0x2000;
216 pNv->PCRTC = pNv->PCRTC0 + 0x800;
217 pNv->PRAMDAC = pNv->PRAMDAC0 + 0x800;
218 pNv->PDIO = pNv->PDIO0 + 0x2000;
220 pNv->PCIO = pNv->PCIO0;
221 pNv->PCRTC = pNv->PCRTC0;
222 pNv->PRAMDAC = pNv->PRAMDAC0;
223 pNv->PDIO = pNv->PDIO0;
230 NVPtr pNv = NVPTR(pScrn);
233 if(!pNv->I2C) return NULL;
235 pNv->DDCBase = bus ? 0x36 : 0x3e;
241 MonInfo = xf86DoEEDID(XF86_SCRN_ARG(pScrn), pNv->I2C, TRUE);
243 MonInfo = xf86DoEDID_DDC2(XF86_SCRN_ARG(pScrn), pNv->I2C);
278 static void nv4GetConfig (NVPtr pNv)
280 if (pNv->PFB[0x0000/4] & 0x00000100) {
281 pNv->RamAmountKBytes = ((pNv->PFB[0x0000/4] >> 12) & 0x0F) * 1024 * 2
284 switch (pNv->PFB[0x0000/4] & 0x00000003) {
286 pNv->RamAmountKBytes = 1024 * 32;
289 pNv->RamAmountKBytes = 1024 * 4;
292 pNv->RamAmountKBytes = 1024 * 8;
296 pNv->RamAmountKBytes = 1024 * 16;
300 pNv->CrystalFreqKHz = (pNv->PEXTDEV[0x0000/4] & 0x00000040) ? 14318 : 13500;
301 pNv->CURSOR = &(pNv->PRAMIN[0x1E00]);
302 pNv->MinVClockFreqKHz = 12000;
303 pNv->MaxVClockFreqKHz = 350000;
306 static void nv10GetConfig (NVPtr pNv)
308 CARD32 implementation = pNv->Chipset & 0x0ff0;
312 if(!(pNv->PMC[0x0004/4] & 0x01000001)) {
313 pNv->PMC[0x0004/4] = 0x01000001;
326 pNv->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
330 pNv->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
332 pNv->RamAmountKBytes = (pNv->PFB[0x020C/4] & 0xFFF00000) >> 10;
338 pNv->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024;
341 pNv->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024;
343 pNv->RamAmountKBytes = (pNv->PFB[0x020C/4] & 0xFFF00000) >> 10;
347 if(pNv->RamAmountKBytes > 256*1024)
348 pNv->RamAmountKBytes = 256*1024;
350 pNv->CrystalFreqKHz = (pNv->PEXTDEV[0x0000/4] & (1 << 6)) ? 14318 : 13500;
352 if(pNv->twoHeads && (implementation != 0x0110))
354 if(pNv->PEXTDEV[0x0000/4] & (1 << 22))
355 pNv->CrystalFreqKHz = 27000;
358 pNv->CURSOR = NULL; /* can't set this here */
359 pNv->MinVClockFreqKHz = 12000;
360 pNv->MaxVClockFreqKHz = pNv->twoStagePLL ? 400000 : 350000;
367 NVPtr pNv = NVPTR(pScrn);
369 CARD16 implementation = pNv->Chipset & 0x0ff0;
406 pVga->MMIOBase = (CARD8 *)pNv;
410 err = pci_device_map_range(pNv->PciInfo, pNv->IOAddress, 0x01000000,
418 pNv->PciTag, pNv->IOAddress, 0x01000000);
420 pNv->REGS = tmp;
422 pNv->PRAMIN = pNv->REGS + (0x00710000/4);
423 pNv->PCRTC0 = pNv->REGS + (0x00600000/4);
424 pNv->PRAMDAC0 = pNv->REGS + (0x00680000/4);
425 pNv->PFB = pNv->REGS + (0x00100000/4);
426 pNv->PFIFO = pNv->REGS + (0x00002000/4);
427 pNv->PGRAPH = pNv->REGS + (0x00400000/4);
428 pNv->PEXTDEV = pNv->REGS + (0x00101000/4);
429 pNv->PTIMER = pNv->REGS + (0x00009000/4);
430 pNv->PMC = pNv->REGS + (0x00000000/4);
431 pNv->FIFO = pNv->REGS + (0x00800000/4);
434 pNv->PCIO0 = (U008*)pNv->REGS + 0x00601000;
435 pNv->PDIO0 = (U008*)pNv->REGS + 0x00681000;
436 pNv->PVIO = (U008*)pNv->REGS + 0x000C0000;
438 pNv->twoHeads = (pNv->Architecture >= NV_ARCH_10) &&
444 pNv->fpScaler = (pNv->FpScale && pNv->twoHeads && (implementation!=0x0110));
446 pNv->twoStagePLL = (implementation == 0x0310) ||
448 (pNv->Architecture >= NV_ARCH_40);
450 pNv->WaitVSyncPossible = (pNv->Architecture >= NV_ARCH_10) &&
453 pNv->BlendingPossible = ((pNv->Chipset & 0xffff) != 0x0020);
456 switch(pNv->Chipset & 0xffff) {
509 if(pNv->Architecture == NV_ARCH_04)
510 nv4GetConfig(pNv);
512 nv10GetConfig(pNv);
516 NVLockUnlock(pNv, 0);
520 pNv->Television = FALSE;
524 if(!pNv->twoHeads) {
525 pNv->CRTCnumber = 0;
530 if((pNv->Chipset & 0x0fff) <= 0x0020)
533 VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
534 if(VGA_RD08(pNv->PCIO, 0x03D5) & 0x80) {
535 VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
536 if(!(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01))
547 if(pNv->FlatPanel == -1) {
548 pNv->FlatPanel = FlatPanel;
549 pNv->Television = Television;
553 pNv->FlatPanel ? "DFP" : "CRT");
564 if(pNv->PRAMDAC0[0x0000052C/4] & 0x100)
568 if(pNv->PRAMDAC0[0x0000252C/4] & 0x100)
581 VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
582 cr44 = VGA_RD08(pNv->PCIO, 0x03D5);
584 VGA_WR08(pNv->PCIO, 0x03D5, 3);
586 NVLockUnlock(pNv, 0);
588 VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
589 slaved_on_B = VGA_RD08(pNv->PCIO, 0x03D5) & 0x80;
591 VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
592 tvB = !(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01);
595 VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
596 VGA_WR08(pNv->PCIO, 0x03D5, 0);
598 NVLockUnlock(pNv, 0);
600 VGA_WR08(pNv->PCIO, 0x03D4, 0x28);
601 slaved_on_A = VGA_RD08(pNv->PCIO, 0x03D5) & 0x80;
603 VGA_WR08(pNv->PCIO, 0x03D4, 0x33);
604 tvA = !(VGA_RD08(pNv->PCIO, 0x03D5) & 0x01);
607 oldhead = pNv->PCRTC0[0x00000860/4];
608 pNv->PCRTC0[0x00000860/4] = oldhead | 0x00000010;
658 if(pNv->FlatPanel == -1) {
660 pNv->FlatPanel = FlatPanel;
661 pNv->Television = Television;
668 pNv->FlatPanel = 1;
672 pNv->FlatPanel = 0;
678 pNv->FlatPanel ? "DFP" : "CRT");
681 if(pNv->CRTCnumber == -1) {
682 if(CRTCnumber != -1) pNv->CRTCnumber = CRTCnumber;
686 if(pNv->FlatPanel) pNv->CRTCnumber = 1;
687 else pNv->CRTCnumber = 0;
689 "...Defaulting to CRTCNumber %i\n", pNv->CRTCnumber);
693 "Forcing CRTCNumber %i as specified\n", pNv->CRTCnumber);
697 if((monitorA->features.input_type && pNv->FlatPanel) ||
698 (!monitorA->features.input_type && !pNv->FlatPanel))
711 if((monitorB->features.input_type && !pNv->FlatPanel) ||
712 (!monitorB->features.input_type && pNv->FlatPanel))
722 cr44 = pNv->CRTCnumber * 0x3;
724 pNv->PCRTC0[0x00000860/4] = oldhead;
726 VGA_WR08(pNv->PCIO, 0x03D4, 0x44);
727 VGA_WR08(pNv->PCIO, 0x03D5, cr44);
728 NVSelectHeadRegisters(pScrn, pNv->CRTCnumber);
733 pNv->FlatPanel ? (pNv->Television ? "TV" : "DFP") : "CRT",
734 pNv->CRTCnumber);
736 if(pNv->FlatPanel && !pNv->Television) {
737 pNv->fpWidth = pNv->PRAMDAC[0x0820/4] + 1;
738 pNv->fpHeight = pNv->PRAMDAC[0x0800/4] + 1;
739 pNv->fpVTotal = pNv->PRAMDAC[0x804/4] + 1;
740 pNv->fpSyncs = pNv->PRAMDAC[0x0848/4] & 0x30000033;
742 pNv->fpWidth, pNv->fpHeight);
752 if(!pNv->FlatPanel || (pScrn->depth != 24) || !pNv->twoHeads)
753 pNv->FPDither = FALSE;
755 pNv->LVDS = FALSE;
756 if(pNv->FlatPanel && pNv->twoHeads) {
757 pNv->PRAMDAC0[0x08B0/4] = 0x00010004;
758 if(pNv->PRAMDAC0[0x08B4/4] & 1)
759 pNv->LVDS = TRUE;
761 pNv->LVDS ? "LVDS" : "TMDS");
Indexes created Fri Jul 31 00:23:59 UTC 2026