Lines Matching refs:clock
105 * Sets DIP0 (Digital Interface Port 0) clock I/O pad drive strength
211 * Sets DVP0 (Digital Video Port 0) clock I/O pad drive strength.
315 * Sets DVP1 (Digital Video Port 1) clock I/O pad drive strength.
624 * 11: One DVI only (decrease the clock jitter) */
782 ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase)
788 "ViaSetDotclock to 0x%06x\n", (unsigned)clock));
791 hwp->writeSeq(hwp, base, clock >> 8);
792 hwp->writeSeq(hwp, base+1, clock & 0xFF);
796 pll.packed = clock;
819 ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock)
823 ViaSetDotclock(pScrn, clock, 0x46, 0x44);
833 ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock)
837 ViaSetDotclock(pScrn, clock, 0x44, 0x4A);
847 ViaSetECKDotclock(ScrnInfoPtr pScrn, CARD32 clock)
849 /* Does the non-pro chip have an ECK clock ? */
850 ViaSetDotclock(pScrn, clock, 0, 0x47);
854 ViaComputeDotClock(unsigned clock)
861 fout = (double)clock * 1.e3;
886 ViaComputeProDotClock(unsigned clock)
893 fout = (double)clock * 1.e3;
908 if (clock < 30000)
910 else if (clock < 45000)
912 else if (clock < 170000)