Cross Reference: /xsrc/external/mit/xf86-video-r128/dist/src/r128

Lines Matching refs:OUTREG
168     OUTREG(R128_OV0_SCALE_CNTL, 0x80000000);
169     OUTREG(R128_OV0_EXCLUSIVE_HORZ, 0);
170     OUTREG(R128_OV0_AUTO_FLIP_CNTL, 0);   /* maybe */
171     OUTREG(R128_OV0_FILTER_CNTL, 0x0000000f);
172     OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
175     OUTREG(R128_OV0_GRAPHICS_KEY_MSK, (1 << pScrn->depth) - 1);
176     OUTREG(R128_OV0_GRAPHICS_KEY_CLR, pPriv->colorKey);
177     OUTREG(R128_OV0_KEY_CNTL, R128_GRAPHIC_KEY_FN_NE);
178     OUTREG(R128_OV0_TEST, 0);
272 	OUTREG(R128_OV0_SCALE_CNTL, 0);
310 	OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
319 	OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
330 	OUTREG(R128_OV0_GRAPHICS_KEY_CLR, pPriv->colorKey);
715     OUTREG(R128_OV0_REG_LOAD_CNTL, 1);
718     OUTREG(R128_OV0_H_INC, h_inc | ((h_inc >> 1) << 16));
719     OUTREG(R128_OV0_STEP_BY, step_by | (step_by << 8));
720     OUTREG(R128_OV0_Y_X_START, dstBox->x1 | (dstBox->y1 << 16));
721     OUTREG(R128_OV0_Y_X_END,   dstBox->x2 | (dstBox->y2 << 16));
722     OUTREG(R128_OV0_V_INC, v_inc);
723     OUTREG(R128_OV0_P1_BLANK_LINES_AT_TOP, 0x00000fff | ((src_h - 1) << 16));
724     OUTREG(R128_OV0_VID_BUF_PITCH0_VALUE, pitch);
725     OUTREG(R128_OV0_P1_X_START_END, (width - 1) | (left << 16));
727     OUTREG(R128_OV0_P2_X_START_END, (width - 1) | (left << 16));
728     OUTREG(R128_OV0_P3_X_START_END, (width - 1) | (left << 16));
729     OUTREG(R128_OV0_VID_BUF0_BASE_ADRS, offset & 0xfffffff0);
730     OUTREG(R128_OV0_P1_V_ACCUM_INIT, p1_v_accum_init);
731     OUTREG(R128_OV0_P23_V_ACCUM_INIT, 0);
732     OUTREG(R128_OV0_P1_H_ACCUM_INIT, p1_h_accum_init);
733     OUTREG(R128_OV0_P23_H_ACCUM_INIT, p23_h_accum_init);
736        OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8C03);
738        OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8B03);
740     OUTREG(R128_OV0_REG_LOAD_CNTL, 0);
809     OUTREG(R128_OV0_REG_LOAD_CNTL, 1);
812     OUTREG(R128_OV0_H_INC, h_inc | ((h_inc >> 1) << 16));
813     OUTREG(R128_OV0_STEP_BY, step_by | (step_by << 8));
814     OUTREG(R128_OV0_Y_X_START, dstBox->x1 | (dstBox->y1 << 16));
815     OUTREG(R128_OV0_Y_X_END,   dstBox->x2 | (dstBox->y2 << 16));
816     OUTREG(R128_OV0_V_INC, v_inc);
817     OUTREG(R128_OV0_P1_BLANK_LINES_AT_TOP, 0x00000fff | ((src_h - 1) << 16));
819     OUTREG(R128_OV0_P23_BLANK_LINES_AT_TOP, 0x000007ff | ((src_h - 1) << 16));
820     OUTREG(R128_OV0_VID_BUF_PITCH0_VALUE, pitch);
821     OUTREG(R128_OV0_VID_BUF_PITCH1_VALUE, pitch >> 1);
822     OUTREG(R128_OV0_P1_X_START_END, (width - 1) | (left << 16));
824     OUTREG(R128_OV0_P2_X_START_END, (width - 1) | (leftUV << 16));
825     OUTREG(R128_OV0_P3_X_START_END, (width - 1) | (leftUV << 16));
826     OUTREG(R128_OV0_VID_BUF0_BASE_ADRS, offset1 & 0xfffffff0);
827     OUTREG(R128_OV0_VID_BUF1_BASE_ADRS, (offset2 & 0xfffffff0) | 0x00000001);
828     OUTREG(R128_OV0_VID_BUF2_BASE_ADRS, (offset3 & 0xfffffff0) | 0x00000001);
829     OUTREG(R128_OV0_P1_V_ACCUM_INIT, p1_v_accum_init);
830     OUTREG(R128_OV0_P23_V_ACCUM_INIT, p23_v_accum_init);
831     OUTREG(R128_OV0_P1_H_ACCUM_INIT, p1_h_accum_init);
832     OUTREG(R128_OV0_P23_H_ACCUM_INIT, p23_h_accum_init);
833     OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8A03);
835     OUTREG(R128_OV0_REG_LOAD_CNTL, 0);
875    OUTREG(R128_CONFIG_CNTL, config_cntl &
1008     OUTREG(R128_CONFIG_CNTL, config_cntl);
1094 		OUTREG(R128_OV0_SCALE_CNTL, 0);
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