Lines Matching refs:MCLK
705 ps3v->MCLK = (int)(real * 1000.0);
706 if (ps3v->MCLK <= 100000) {
708 ps3v->MCLK / 1000.0 );
712 , ps3v->MCLK/1000.0);
713 ps3v->MCLK = 0;
716 ps3v->MCLK = 0;
1102 if (ps3v->MCLK <= 0)
1103 ps3v->MCLK = 74000;
1112 /* Detect current MCLK and print it for user */
1157 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected current MCLK value of %1.3f MHz\n",
1901 /* Restore extended sequencer regs for MCLK. SR10 == 255 indicates that
1935 /* Load new m,n PLL values for DCLK & MCLK */
2765 * MCLK's to both refresh and the graphics engine, to diminish the
2777 * the boards MCLK setting.
2787 /* And setup here the new value for MCLK. We use the XConfig
2788 * option "set_mclk", whose value gets stored in ps3v->MCLK.
2793 if(ps3v->MCLK> 0) {
2796 (int)(ps3v->MCLK / ps3v->refclk_fact),
2800 S3VCommonCalcClock(pScrn, mode, ps3v->MCLK, 1, 1, 31, 0, 3,