Cross Reference: /xsrc/external/mit/xf86-video-savage/dist/src/savage

Lines Matching refs:restore
2465 			    SavageRegPtr restore, Bool Entering)
2477     TRACE(("SavageWriteMode(%x)\n", restore->mode));
2488 	SavageSetVESAMode( psav, restore->mode | 0x8000, restore->refresh );
2503     if( psav->UseBIOS && restore->mode > 0x13 )
2510 	SavageSetVESAMode( psav, restore->mode | 0x8000, restore->refresh );
2544 	VGAOUT8(vgaCRReg, restore->CR67);
2574 		    if( restore->refresh >= 130 )
2580 			(restore->refresh >= 75)
2594  *		if( restore->refresh >= 130 )
2703     if( ((restore->CR31 & 0x0a) == 0) && psav->pVbe ) {
2709     /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */
2710     VGAOUT8(vgaCRReg, restore->CR67 & ~0x0e); /* no STREAMS yet old and new */
2712     /* restore extended regs */
2714     VGAOUT8(vgaCRReg, restore->CR66);
2716     VGAOUT8(vgaCRReg, restore->CR3A);
2718     VGAOUT8(vgaCRReg, restore->CR31);
2720     VGAOUT8(vgaCRReg, restore->CR32);
2722     VGAOUT8(vgaCRReg, restore->CR58);
2724     VGAOUT8(vgaCRReg, restore->CR53 & 0x7f);
2731     VGAOUT8(0x3c5, restore->SR0E);
2733     VGAOUT8(0x3c5, restore->SR0F);
2735     VGAOUT8(0x3c5, restore->SR29);
2737     VGAOUT8(0x3c5, restore->SR15);
2745 	    VGAOUT8(0x3c5, restore->SR54[i]);
2749     /* restore the standard vga regs */
2757     VGAOUT8(vgaCRReg, restore->CR53);
2759     VGAOUT8(vgaCRReg, restore->CR5D);
2761     VGAOUT8(vgaCRReg, restore->CR5E);
2763     VGAOUT8(vgaCRReg, restore->CR3B);
2765     VGAOUT8(vgaCRReg, restore->CR3C);
2767     VGAOUT8(vgaCRReg, restore->CR43);
2769     VGAOUT8(vgaCRReg, restore->CR65);
2771     /* restore the desired video mode with cr67 */
2773     /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */
2774     VGAOUT8(vgaCRReg, restore->CR67 & ~0x0e); /* no streams for new and old streams engines */
2778     VGAOUT8(vgaCRReg, restore->CR34);
2780     VGAOUT8(vgaCRReg, restore->CR40);
2782     VGAOUT8(vgaCRReg, restore->CR42);
2784     VGAOUT8(vgaCRReg, restore->CR45);
2786     VGAOUT8(vgaCRReg, restore->CR50);
2788     VGAOUT8(vgaCRReg, restore->CR51);
2792     VGAOUT8(vgaCRReg, restore->CR36);
2794     VGAOUT8(vgaCRReg, restore->CR60);
2796     VGAOUT8(vgaCRReg, restore->CR68);
2799     VGAOUT8(vgaCRReg, restore->CR69);
2801     VGAOUT8(vgaCRReg, restore->CR6F);
2804     VGAOUT8(vgaCRReg, restore->CR33);
2806     VGAOUT8(vgaCRReg, restore->CR86);
2808     VGAOUT8(vgaCRReg, restore->CR88);
2810     VGAOUT8(vgaCRReg, restore->CR90);
2812     VGAOUT8(vgaCRReg, restore->CR91);
2816 	VGAOUT8(vgaCRReg, restore->CRB0);
2820     VGAOUT8(vgaCRReg, restore->CR32);
2829     if (restore->SR10 != 255) {
2831 	VGAOUT8(0x3c5, restore->SR10);
2833 	VGAOUT8(0x3c5, restore->SR11);
2836     /* restore extended seq regs for dclk */
2838     VGAOUT8(0x3c5, restore->SR0E);
2840     VGAOUT8(0x3c5, restore->SR0F);
2842     VGAOUT8(0x3c5, restore->SR12);
2844     VGAOUT8(0x3c5, restore->SR13);
2846     VGAOUT8(0x3c5, restore->SR29);
2849     VGAOUT8(0x3c5, restore->SR18);
2852 	VGAOUT8(0x3c5, restore->SR1B & ~0x08 );
2854 	VGAOUT8(0x3c5, restore->SR1B);
2863     VGAOUT8(0x3c5, restore->SR15);
2867     VGAOUT8(0x3c5, restore->SR30);
2869     VGAOUT8(0x3c5, restore->SR08);
2879     VGAOUT8(vgaCRReg, restore->CR67);
2894 	OUTREG(FIFO_CONTROL_REG, restore->MMPR0);
2895 	OUTREG(MIU_CONTROL_REG, restore->MMPR1);
2896 	OUTREG(STREAMS_TIMEOUT_REG, restore->MMPR2);
2897 	OUTREG(MISC_TIMEOUT_REG, restore->MMPR3);
4066 	SAVPTR(pScrn)->hwc_on = TRUE; /*restore */
4268     /* restore saved CLUT index value */