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      1 /*	$NetBSD: pmap_bootstrap.c,v 1.43 2026/04/05 14:35:48 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1991, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  *	@(#)pmap_bootstrap.c	8.1 (Berkeley) 6/10/93
     36  */
     37 
     38 #include <sys/cdefs.h>
     39 __KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.43 2026/04/05 14:35:48 thorpej Exp $");
     40 
     41 #include <sys/param.h>
     42 #include <uvm/uvm_extern.h>
     43 
     44 #include <machine/cpu.h>
     45 #include <machine/pte.h>
     46 #include <machine/vmparam.h>
     47 
     48 #define RELOC(v, t)	*((t*)((uintptr_t)&(v) + firstpa - KERNBASE))
     49 
     50 extern char *etext;
     51 extern paddr_t avail_start, avail_end;
     52 extern vaddr_t kernel_reloc_offset;
     53 
     54 /*
     55  * Special purpose kernel virtual addresses, used for mapping
     56  * physical pages for a variety of temporary or permanent purposes:
     57  *
     58  *	CADDR1, CADDR2:	pmap zero/copy operations
     59  *	vmmap:		/dev/mem, crash dumps, parity error checking
     60  *	msgbufaddr:	kernel message buffer
     61  */
     62 void *CADDR1, *CADDR2;
     63 char *vmmap;
     64 extern void *msgbufaddr;
     65 
     66 paddr_t pmap_bootstrap1(paddr_t, paddr_t);
     67 
     68 /*
     69  * Bootstrap the VM system.
     70  *
     71  * Called with MMU off so we must relocate all global references by `firstpa'
     72  * (don't call any functions here!)  `nextpa' is the first available physical
     73  * memory address.  Returns an updated first PA reflecting the memory we
     74  * have allocated.  MMU is still off when we return.
     75  *
     76  * XXX assumes sizeof(u_int) == sizeof(pt_entry_t)
     77  * XXX a PIC compiler would make this much easier.
     78  */
     79 paddr_t __attribute__((no_instrument_function))
     80 pmap_bootstrap1(paddr_t nextpa, paddr_t firstpa)
     81 {
     82 	paddr_t lwp0upa, kstpa, kptmpa, kptpa;
     83 	paddr_t lkptpa;
     84 	u_int nptpages, kstsize;
     85 	st_entry_t protoste, *ste, *este;
     86 	pt_entry_t protopte, *pte, *epte;
     87 	u_int stfree = 0;	/* XXX: gcc -Wuninitialized */
     88 
     89 	nextpa = m68k_round_page(nextpa);
     90 
     91 	/*
     92 	 * Calculate important physical addresses:
     93 	 *
     94 	 *	lwp0upa		lwp0 u-area		UPAGES pages
     95 	 *
     96 	 *	kstpa		kernel segment table	1 page (!040)
     97 	 *						N pages (040)
     98 	 *
     99 	 *	kptmpa		kernel PT map		1 page
    100 	 *
    101 	 *	lkptpa		last kernel PT page	1 page
    102 	 *
    103 	 *	kptpa		statically allocated
    104 	 *			kernel PT pages		Sysptsize+ pages
    105 	 *
    106 	 * [ Sysptsize is the number of pages of PT, and IIOMAPSIZE and
    107 	 *   EIOMAPSIZE are the number of PTEs, hence we need to round
    108 	 *   the total to a page boundary with IO maps at the end. ]
    109 	 *
    110 	 * The KVA corresponding to any of these PAs is:
    111 	 *	(PA - firstpa + KERNBASE).
    112 	 */
    113 	RELOC(kernel_reloc_offset, vaddr_t) = firstpa;
    114 
    115 	lwp0upa = nextpa;
    116 	nextpa += USPACE;
    117 	if (RELOC(mmutype, int) == MMU_68040)
    118 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
    119 	else
    120 		kstsize = 1;
    121 	kstpa = nextpa;
    122 	nextpa += kstsize * PAGE_SIZE;
    123 	kptmpa = nextpa;
    124 	nextpa += PAGE_SIZE;
    125 	lkptpa = nextpa;
    126 	nextpa += PAGE_SIZE;
    127 	kptpa = nextpa;
    128 	nptpages = RELOC(Sysptsize, int) +
    129 	    howmany(RELOC(physmem, psize_t), NPTEPG);
    130 	nextpa += nptpages * PAGE_SIZE;
    131 
    132 	/*
    133 	 * Initialize segment table and kernel page table map.
    134 	 *
    135 	 * On 68030s and earlier MMUs the two are identical except for
    136 	 * the valid bits so both are initialized with essentially the
    137 	 * same values.  On the 68040, which has a mandatory 3-level
    138 	 * structure, the segment table holds the level 1 table and part
    139 	 * (or all) of the level 2 table and hence is considerably
    140 	 * different.  Here the first level consists of 128 descriptors
    141 	 * (512 bytes) each mapping 32mb of address space.  Each of these
    142 	 * points to blocks of 128 second level descriptors (512 bytes)
    143 	 * each mapping 256kb.  Note that there may be additional "segment
    144 	 * table" pages depending on how large MAXKL2SIZE is.
    145 	 *
    146 	 * Portions of the last two segment of KVA space (0xFF800000 -
    147 	 * 0xFFFFFFFF) are mapped for a couple of purposes.
    148 	 * The first segment (0xFF800000 - 0xFFBFFFFF) is mapped
    149 	 * for the kernel page tables.
    150 	 *
    151 	 * XXX: It looks this was copied from hp300 and not sure if
    152 	 * XXX: last physical page mapping is really needed on this port.
    153 	 * The very last page (0xFFFFF000) in the second segment is mapped
    154 	 * to the last physical page of RAM to give us a region in which
    155 	 * PA == VA.  We use the first part of this page for enabling
    156 	 * and disabling mapping.  The last part of this page also contains
    157 	 * info left by the boot ROM.
    158 	 *
    159 	 * XXX cramming two levels of mapping into the single "segment"
    160 	 * table on the 68040 is intended as a temporary hack to get things
    161 	 * working.  The 224mb of address space that this allows will most
    162 	 * likely be insufficient in the future (at least for the kernel).
    163 	 */
    164 	if (RELOC(mmutype, int) == MMU_68040) {
    165 		int nl1desc, nl2desc, i;
    166 
    167 		/*
    168 		 * First invalidate the entire "segment table" pages
    169 		 * (levels 1 and 2 have the same "invalid" value).
    170 		 */
    171 		ste = (st_entry_t *)kstpa;
    172 		este = &ste[kstsize * NPTEPG];
    173 		while (ste < este)
    174 			*ste++ = SG_NV;
    175 		/*
    176 		 * Initialize level 2 descriptors (which immediately
    177 		 * follow the level 1 table).  We need:
    178 		 *	NPTEPG / SG4_LEV3SIZE
    179 		 * level 2 descriptors to map each of the nptpages
    180 		 * pages of PTEs.  Note that we set the "used" bit
    181 		 * now to save the HW the expense of doing it.
    182 		 */
    183 		nl2desc = nptpages * (NPTEPG / SG4_LEV3SIZE);
    184 		ste = (st_entry_t *)kstpa;
    185 		ste = &ste[SG4_LEV1SIZE];
    186 		este = &ste[nl2desc];
    187 		protoste = kptpa | SG_U | SG_RW | SG_V;
    188 		while (ste < este) {
    189 			*ste++ = protoste;
    190 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    191 		}
    192 		/*
    193 		 * Initialize level 1 descriptors.  We need:
    194 		 *	howmany(nl2desc, SG4_LEV2SIZE)
    195 		 * level 1 descriptors to map the `nl2desc' level 2's.
    196 		 */
    197 		nl1desc = howmany(nl2desc, SG4_LEV2SIZE);
    198 		ste = (st_entry_t *)kstpa;
    199 		este = &ste[nl1desc];
    200 		protoste = (paddr_t)&ste[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V;
    201 		while (ste < este) {
    202 			*ste++ = protoste;
    203 			protoste += (SG4_LEV2SIZE * sizeof(st_entry_t));
    204 		}
    205 		/*
    206 		 * Initialize the final level 1 descriptor to map the next
    207 		 * block of level 2 descriptors for Sysptmap.
    208 		 */
    209 		ste = (st_entry_t *)kstpa;
    210 		ste = &ste[SG4_LEV1SIZE - 1];
    211 		*ste = protoste;
    212 		/*
    213 		 * Now initialize the final portion of that block of
    214 		 * descriptors to map Sysmap and the "last PT page".
    215 		 */
    216 		i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE);
    217 		ste = (st_entry_t *)kstpa;
    218 		ste = &ste[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE) * 2];
    219 		este = &ste[NPTEPG / SG4_LEV3SIZE];
    220 		protoste = kptmpa | SG_U | SG_RW | SG_V;
    221 		while (ste < este) {
    222 			*ste++ = protoste;
    223 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    224 		}
    225 		este = &ste[NPTEPG / SG4_LEV3SIZE];
    226 		protoste = lkptpa | SG_U | SG_RW | SG_V;
    227 		while (ste < este) {
    228 			*ste++ = protoste;
    229 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    230 		}
    231 		/*
    232 		 * Calculate the free level 2 descriptor mask
    233 		 * noting that we have used:
    234 		 *	0:		level 1 table
    235 		 *	1 to nl1desc:	map page tables
    236 		 *	nl1desc + 1:	maps kptmpa and last-page page table
    237 		 */
    238 		/* mark an entry for level 1 table */
    239 		stfree = ~l2tobm(0);
    240 		/* mark entries for map page tables */
    241 		for (i = 1; i <= nl1desc; i++)
    242 			stfree &= ~l2tobm(i);
    243 		/* mark an entry for kptmpa and lkptpa */
    244 		stfree &= ~l2tobm(i);
    245 		/* mark entries not available */
    246 		for (i = MAXKL2SIZE; i < sizeof(stfree) * NBBY; i++)
    247 			stfree &= ~l2tobm(i);
    248 
    249 		/*
    250 		 * Initialize Sysptmap
    251 		 */
    252 		pte = (pt_entry_t *)kptmpa;
    253 		epte = &pte[nptpages];
    254 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    255 		while (pte < epte) {
    256 			*pte++ = protopte;
    257 			protopte += PAGE_SIZE;
    258 		}
    259 		/*
    260 		 * Invalidate all remaining entries.
    261 		 */
    262 		epte = (pt_entry_t *)kptmpa;
    263 		epte = &epte[TIB_SIZE];
    264 		while (pte < epte) {
    265 			*pte++ = PG_NV;
    266 		}
    267 		/*
    268 		 * Initialize the last ones to point to Sysptmap and the page
    269 		 * table page allocated earlier.
    270 		 */
    271 		pte = (pt_entry_t *)kptmpa;
    272 		pte = &pte[SYSMAP_VA >> SEGSHIFT];
    273 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    274 		pte++;		/* XXX should use [MAXADDR >> SEGSHIFT] */
    275 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    276 	} else {
    277 		/*
    278 		 * Map the page table pages in both the HW segment table
    279 		 * and the software Sysptmap.
    280 		 */
    281 		ste = (st_entry_t *)kstpa;
    282 		pte = (pt_entry_t *)kptmpa;
    283 		epte = &pte[nptpages];
    284 		protoste = kptpa | SG_RW | SG_V;
    285 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    286 		while (pte < epte) {
    287 			*ste++ = protoste;
    288 			*pte++ = protopte;
    289 			protoste += PAGE_SIZE;
    290 			protopte += PAGE_SIZE;
    291 		}
    292 		/*
    293 		 * Invalidate all remaining entries in both.
    294 		 */
    295 		este = (st_entry_t *)kstpa;
    296 		este = &este[TIA_SIZE];
    297 		while (ste < este)
    298 			*ste++ = SG_NV;
    299 		epte = (pt_entry_t *)kptmpa;
    300 		epte = &epte[TIB_SIZE];
    301 		while (pte < epte)
    302 			*pte++ = PG_NV;
    303 		/*
    304 		 * Initialize the last ones to point to Sysptmap and the page
    305 		 * table page allocated earlier.
    306 		 */
    307 		ste = (st_entry_t *)kstpa;
    308 		ste = &ste[SYSMAP_VA >> SEGSHIFT];
    309 		pte = (pt_entry_t *)kptmpa;
    310 		pte = &pte[SYSMAP_VA >> SEGSHIFT];
    311 		*ste = kptmpa | SG_RW | SG_V;
    312 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    313 		ste++;		/* XXX should use [MAXADDR >> SEGSHIFT] */
    314 		pte++;		/* XXX should use [MAXADDR >> SEGSHIFT] */
    315 		*ste = lkptpa | SG_RW | SG_V;
    316 		*pte = lkptpa | PG_RW | PG_CI | PG_V;
    317 	}
    318 
    319 	/*
    320 	 * Invalidate all but the final entry in the last kernel PT page.
    321 	 * The final entry maps the last page of physical memory to
    322 	 * prepare a page that is PA == VA to turn on the MMU.
    323 	 *
    324 	 * XXX: This looks copied from hp300 where PA != VA, but
    325 	 * XXX: it's suspicious if this is also required on this port.
    326 	 */
    327 	pte = (pt_entry_t *)lkptpa;
    328 	epte = &pte[NPTEPG];
    329 	while (pte < epte)
    330 		*pte++ = PG_NV;
    331 	/*
    332 	 * Initialize kernel page table.
    333 	 * Start by invalidating the `nptpages' that we have allocated.
    334 	 */
    335 	pte = (pt_entry_t *)kptpa;
    336 	epte = &pte[nptpages * NPTEPG];
    337 	while (pte < epte)
    338 		*pte++ = PG_NV;
    339 	/*
    340 	 * Validate PTEs for kernel text (RO).
    341 	 */
    342 	pte = (pt_entry_t *)kptpa;
    343 	pte = &pte[m68k_btop(KERNBASE)];
    344 	epte = &((u_int *)kptpa)[m68k_btop(m68k_trunc_page(&etext))];
    345 	protopte = firstpa | PG_RO | PG_V;
    346 	while (pte < epte) {
    347 		*pte++ = protopte;
    348 		protopte += PAGE_SIZE;
    349 	}
    350 	/*
    351 	 * Validate PTEs for kernel data/bss, dynamic data allocated
    352 	 * by us so far (kstpa - firstpa bytes), and pages for lwp0
    353 	 * u-area and page table allocated below (RW).
    354 	 */
    355 	epte = (pt_entry_t *)kptpa;
    356 	epte = &epte[m68k_btop(KERNBASE + kstpa - firstpa)];
    357 	protopte = (protopte & ~PG_PROT) | PG_RW;
    358 	/*
    359 	 * Enable copy-back caching of data pages
    360 	 */
    361 	if (RELOC(mmutype, int) == MMU_68040)
    362 		protopte |= PG_CCB;
    363 	while (pte < epte) {
    364 		*pte++ = protopte;
    365 		protopte += PAGE_SIZE;
    366 	}
    367 	/*
    368 	 * Map the kernel segment table cache invalidated for 68040/68060.
    369 	 * (for the 68040 not strictly necessary, but recommended by Motorola;
    370 	 *  for the 68060 mandatory)
    371 	 */
    372 	epte = (pt_entry_t *)kptpa;
    373 	epte = &epte[m68k_btop(KERNBASE + nextpa - firstpa)];
    374 	protopte = (protopte & ~PG_PROT) | PG_RW;
    375 	if (RELOC(mmutype, int) == MMU_68040) {
    376 		protopte &= ~PG_CCB;
    377 		protopte |= PG_CIN;
    378 	}
    379 	while (pte < epte) {
    380 		*pte++ = protopte;
    381 		protopte += PAGE_SIZE;
    382 	}
    383 
    384 	/*
    385 	 * Calculate important exported kernel addresses and related values.
    386 	 */
    387 	/*
    388 	 * Sysseg: base of kernel segment table
    389 	 */
    390 	RELOC(Sysseg, st_entry_t *) =
    391 		(st_entry_t *)(kstpa - firstpa + KERNBASE);
    392 	RELOC(Sysseg_pa, paddr_t) = kstpa;
    393 	if (RELOC(mmutype, int) == MMU_68040)
    394 		RELOC(protostfree, u_int) = stfree;
    395 	/*
    396 	 * Sysptmap: base of kernel page table map
    397 	 */
    398 	RELOC(Sysptmap, pt_entry_t *) =
    399 		(pt_entry_t *)(kptmpa - firstpa + KERNBASE);
    400 	/*
    401 	 * Sysmap: kernel page table (as mapped through Sysptmap)
    402 	 * Allocated at the end of KVA space.
    403 	 */
    404 	RELOC(Sysmap, pt_entry_t *) = (pt_entry_t *)SYSMAP_VA;
    405 
    406 	/*
    407 	 * Remember the u-area address so it can be loaded in the lwp0
    408 	 * via uvm_lwp_setuarea() later in pmap_bootstrap2().
    409 	 */
    410 	RELOC(lwp0uarea, vaddr_t) = lwp0upa - firstpa + KERNBASE;
    411 
    412 	/*
    413 	 * VM data structures are now initialized, set up data for
    414 	 * the pmap module.
    415 	 *
    416 	 * Note about avail_end: msgbuf is initialized just after
    417 	 * avail_end in machdep.c.
    418 	 * Since the last page is used for rebooting the system
    419 	 * (code is copied there and execution continues from copied code
    420 	 * before the MMU is disabled), the msgbuf will get trounced
    421 	 * between reboots if it's placed in the last physical page.
    422 	 * To work around this, we move avail_end back one more
    423 	 * page so the msgbuf can be preserved.
    424 	 */
    425 	RELOC(virtual_avail, vaddr_t) =
    426 		KERNBASE + (nextpa - firstpa);
    427 	RELOC(virtual_end, vaddr_t) = VM_MAX_KERNEL_ADDRESS;
    428 
    429 	/*
    430 	 * Allocate some fixed, special purpose kernel virtual addresses
    431 	 */
    432 	{
    433 		vaddr_t va = RELOC(virtual_avail, vaddr_t);
    434 
    435 		RELOC(CADDR1, void *) = (void *)va;
    436 		va += PAGE_SIZE;
    437 		RELOC(CADDR2, void *) = (void *)va;
    438 		va += PAGE_SIZE;
    439 		RELOC(vmmap, void *) = (void *)va;
    440 		va += PAGE_SIZE;
    441 		RELOC(msgbufaddr, void *) = (void *)va;
    442 		va += m68k_round_page(MSGBUFSIZE);
    443 		RELOC(virtual_avail, vaddr_t) = va;
    444 	}
    445 
    446 	return nextpa;
    447 }
    448