Lines Matching refs:VALUE
74 int32_t value;
145 int32_t value;
263 int32_t value;
300 int32_t value;
322 int32_t value;
356 int32_t value;
389 int32_t value;
413 int32_t value;
431 int32_t value;
450 int32_t value;
457 * 0:7 PLL M Value
458 * 8:14 PLL N Value
471 * Input Frequency is the input crystal frequency value (24 MHz in
472 * the SMI VGX Demo Board). N must be a value between 2 and 24.
473 * M can be any (8 bits) value, and a loop testing all possible N
474 * values should be the best approach to calculate it's value.
484 int32_t value;
541 int32_t value;
570 int32_t value;
590 int32_t value;
608 int32_t value;
626 int32_t value;
643 int32_t value;
660 int32_t value;
677 int32_t value;
694 int32_t value;
711 int32_t value;
728 int32_t value;
746 * 24:27 Alpha Plane Alpha Value.
750 * 1: Use alpha value specified in Alpha.
761 int32_t value;
790 int32_t value;
810 int32_t value;
827 int32_t value;
844 int32_t value;
852 * 0:15 Chroma Key Value for Alpha Plane.
861 int32_t value : bits( 0, 15);
864 int32_t value;
917 int32_t value;
946 int32_t value;
966 int32_t value;
983 int32_t value;
1000 int32_t value;
1017 int32_t value;
1034 int32_t value;
1056 int32_t value;
1233 * is met. The value of the Status Test register is masked with the
1307 * 0:27 A signed relative value that will be added to the
1317 * adding the signed value of Address to the address of
1332 int64_t value;
1357 address.value = READ_SCR(pSmi, CMD_ADDR); \
1364 #define BATCH_LOAD_REG(PORT, VALUE) \
1369 ErrorF("BATCH_LOAD_REG(%x, %x)\n", PORT, VALUE); \
1372 entry->f.data = VALUE; \
1404 address.value = READ_SCR(pSmi, CMD_ADDR); \
1409 WRITE_SCR(pSmi, CMD_ADDR, address.value); \
1424 WRITE_SCR(pSmi, CMD_ADDR, address.value); \
1426 address.value = READ_SCR(pSmi, CMD_ADDR); \
1427 ErrorF("loop: %x\n", address.value); \
Indexes created Fri Apr 10 00:22:58 UTC 2026