Lines Matching refs:HalfDCLK
316 if(modeflag & HalfDCLK) return 0;
2210 if(modeflag & HalfDCLK) {
2849 if(SiS_Pr->CModeFlag & HalfDCLK) xres <<= 1;
2878 if(modeflag & HalfDCLK) xres <<= 1;
3168 if(modeflag & HalfDCLK) tempax <<= 1;
3186 if(SiS_Pr->CModeFlag & HalfDCLK) ResIndex <<= 1;
3372 if(modeflag & HalfDCLK) tempax <<= 1;
3415 if(modeflag & HalfDCLK) {
3474 if(modeflag & HalfDCLK) {
3503 if(modeflag & HalfDCLK) tempax <<= 1;
3529 if((SiS_Pr->SiS_RVBHRS2) && (modeflag & HalfDCLK)) {
3898 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 632;
3903 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320;
3909 if(!(modeflag & HalfDCLK)) {
5393 if(modeflag & HalfDCLK) SiS_Pr->CHDisplay >>= 1;
5406 if(!(modeflag & HalfDCLK)) temp -= 32;
5467 if(modeflag & HalfDCLK) temp |= 0x08;
5468 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,temp); /* SR01: HalfDCLK[3], 8/9 div dotclock[0] */
5863 if(modeflag & HalfDCLK) tempeax >>= 1;
5907 if(modeflag & HalfDCLK) tempecx >>= 1;
6154 if(modeflag & HalfDCLK) {
6174 if(modeflag & HalfDCLK) {
6213 if(modeflag & HalfDCLK) tempax >>= 1;
6238 if(modeflag & HalfDCLK) tempax >>= 1;
6417 if(modeflag & HalfDCLK) tempax |= 0x40;
6965 if(!(modeflag & HalfDCLK)) {
6974 if(!(modeflag & HalfDCLK)) {
6989 if(modeflag & HalfDCLK) tempcl <<= 1;
7296 if(modeflag & HalfDCLK) tempbx <<= 1;
7320 if(modeflag & HalfDCLK) tempbx <<= 1;
7620 if(modeflag & HalfDCLK) tempbx >>= 1;
7688 if(modeflag & HalfDCLK) tempax >>= 1;
7833 if(modeflag & HalfDCLK) (*DisplayType)++;
10807 if(!(modeflag & HalfDCLK)) {
10895 if(modeflag & HalfDCLK) myindex = 1;