Lines Matching refs:PanelYRes
1751 case Panel_320x240_3: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480;
1756 case Panel_640x480: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480;
1761 case Panel_800x600: SiS_Pr->PanelXRes = 800; SiS_Pr->PanelYRes = 600;
1768 case Panel_1024x600: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 600;
1775 case Panel_1024x768: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768;
1787 case Panel_1152x768: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 768;
1798 case Panel_1152x864: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 864;
1800 case Panel_1280x720: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 720;
1808 case Panel_1280x768: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768;
1821 case Panel_1280x768_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768;
1828 case Panel_1280x800: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800;
1835 case Panel_1280x800_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800;
1842 case Panel_1280x854: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 854;
1849 case Panel_1280x960: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 960;
1858 case Panel_1280x1024: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 1024;
1866 case Panel_1400x1050: SiS_Pr->PanelXRes = 1400; SiS_Pr->PanelYRes = 1050;
1873 case Panel_1600x1200: SiS_Pr->PanelXRes = 1600; SiS_Pr->PanelYRes = 1200;
1893 case Panel_1680x1050: SiS_Pr->PanelXRes = 1680; SiS_Pr->PanelYRes = 1050;
1900 case Panel_Barco1366: SiS_Pr->PanelXRes = 1360; SiS_Pr->PanelYRes = 1024;
1903 case Panel_848x480: SiS_Pr->PanelXRes = 848; SiS_Pr->PanelYRes = 480;
1906 case Panel_856x480: SiS_Pr->PanelXRes = 856; SiS_Pr->PanelYRes = 480;
1910 SiS_Pr->PanelYRes = SiS_Pr->CP_MaxY;
1915 SiS_Pr->PanelYRes = SiS_Pr->CP_VDisplay[SiS_Pr->CP_PreferredIndex];
1924 SiS_Pr->PanelVRS -= SiS_Pr->PanelYRes;
1941 default: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768;
2153 if(modexres == SiS_Pr->PanelXRes && modeyres == SiS_Pr->PanelYRes) {
2174 (modexres > SiS_Pr->PanelXRes) || (modeyres > SiS_Pr->PanelYRes)) {
2603 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah &= ~0x80;
2618 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah = 0;
3211 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes;
3215 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT - (SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE);
3300 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes;
3604 tempbx = SiS_Pr->PanelYRes;
3724 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3763 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->PanelYRes) {
3764 SiS_Pr->SiS_LCDVDES = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE) / 2);
3767 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3810 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->PanelYRes) {
3811 SiS_Pr->SiS_LCDVDES = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE) / 2);
3835 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3845 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3856 (SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) ) {
3881 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
5690 tempax = SiS_Pr->PanelYRes;
5703 tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->PanelYRes;
7128 if((SiS_Pr->SiS_LCDInfo & LCDPass11) || (SiS_Pr->PanelYRes == SiS_Pr->SiS_VDE)) {
7132 tempbx = SiS_Pr->SiS_VDE + ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VDE) / 2);
7133 tempcx = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VDE) / 2);
7136 tempbx = SiS_Pr->PanelYRes;
7139 if(SiS_Pr->PanelYRes != SiS_Pr->SiS_VDE) {
7140 tempax = SiS_Pr->PanelYRes;
7142 if(SiS_Pr->PanelYRes < SiS_Pr->SiS_VDE) {
7170 tempax = SiS_Pr->PanelYRes;
7174 if(SiS_Pr->PanelYRes != SiS_Pr->SiS_VDE) {
7181 if(SiS_Pr->PanelYRes != SiS_Pr->SiS_VDE) {
7183 tempax = SiS_Pr->SiS_VT - SiS_Pr->PanelYRes;
9924 if((SiS_Pr->PanelXRes <= 1280) && (SiS_Pr->PanelYRes <= 1024)) {
9932 if((SiS_Pr->PanelXRes > 1280) && (SiS_Pr->PanelYRes > 1024)) {
10496 if((SiS_Pr->PanelXRes <= 1024) && (SiS_Pr->PanelYRes <= 768)) {
10498 } else if((SiS_Pr->PanelXRes == 1280) && (SiS_Pr->PanelYRes == 1024)) {
10500 } else if((SiS_Pr->PanelXRes <= 1400) && (SiS_Pr->PanelYRes <= 1050)) {
10502 } else if((SiS_Pr->PanelXRes <= 1600) && (SiS_Pr->PanelYRes <= 1200)) {
Indexes created Tue Jul 21 00:24:56 UTC 2026