Cross Reference: /xsrc/external/mit/xf86-video-sis/dist/src/sis

Lines Matching defs:pSIS
124   SISPtr pSIS = SISPTR(pScrn);
131    pSIS->cmdQueueLenPtrBackup = NULL;
133    pSIS->cmdQ_SharedWritePortBackup = NULL;
162   pSIS->pDRIInfo = pDRIInfo;
165   if(pSIS->VGAEngine == SIS_300_VGA) {
167   } else if(pSIS->ChipFlags & SiSCF_IsXGI) {
175      pDRIInfo->busIdString = DRICreatePCIBusID(pSIS->PciInfo);
180 	     pSIS->PciBus, pSIS->PciDevice, pSIS->PciFunc);
206   pDRIInfo->frameBufferPhysicalAddress = pSIS->realFbAddress;
208   pDRIInfo->frameBufferPhysicalAddress = (pointer)pSIS->realFbAddress;
210   pDRIInfo->frameBufferSize = pSIS->FbMapSize;
213   pDRIInfo->frameBufferStride = pSIS->scrnOffset;
243      DRIDestroyInfoRec(pSIS->pDRIInfo);
244      pSIS->pDRIInfo = 0;
258   if(!DRIScreenInit(pScreen, pDRIInfo, &pSIS->drmSubFD)) {
262      DRIDestroyInfoRec(pSIS->pDRIInfo);
263      pSIS->pDRIInfo = 0;
264      pSIS->drmSubFD = -1;
270   version = drmGetVersion(pSIS->drmSubFD);
289         fb.offset = pSIS->DRIheapstart;
290         fb.size = pSIS->DRIheapend - pSIS->DRIheapstart;
291         drmCommandWrite(pSIS->drmSubFD, DRM_SIS_FB_INIT, &fb, sizeof(fb));
294 		pSIS->DRIheapstart, pSIS->DRIheapend,
295 		(int)((pSIS->DRIheapend - pSIS->DRIheapstart) >> 10));
306   if(drmAddMap(pSIS->drmSubFD, (drm_handle_t)pSIS->IOAddress,
321     pSIS->agpWantedSize = pSIS->agpWantedPages * AGP_PAGE_SIZE;
322     pSIS->agpSize = 0;
323     pSIS->agpCmdBufSize = 0;
326     if(!pSIS->IsAGPCard)
329     if(drmAgpAcquire(pSIS->drmSubFD) < 0) {
334     switch(pSIS->VGAEngine) {
347     if(drmAgpEnable(pSIS->drmSubFD, drmAgpGetMode(pSIS->drmSubFD) & agpmodemask) < 0) {
357     if(drmAgpAlloc(pSIS->drmSubFD, pSIS->agpWantedSize, 0, NULL, &pSIS->agpHandle) < 0) {
360 		(int)(pSIS->agpWantedSize / (1024 * 1024)));
362        if(pSIS->agpWantedSize > AGP_DEFAULT_SIZE) {
366 	  pSIS->agpWantedSize = AGP_DEFAULT_SIZE;
368 	  if(drmAgpAlloc(pSIS->drmSubFD, pSIS->agpWantedSize, 0, NULL, &pSIS->agpHandle) < 0) {
371 	     drmAgpRelease(pSIS->drmSubFD);
377 	  drmAgpRelease(pSIS->drmSubFD);
385 		(int)(pSIS->agpWantedSize / (1024 * 1024)));
387     if(drmAgpBind(pSIS->drmSubFD, pSIS->agpHandle, 0) < 0) {
390        drmAgpFree(pSIS->drmSubFD, pSIS->agpHandle);
392        if(pSIS->agpWantedSize > AGP_DEFAULT_SIZE) {
395 	  pSIS->agpWantedSize = AGP_DEFAULT_SIZE;
397 	  if(drmAgpAlloc(pSIS->drmSubFD, pSIS->agpWantedSize, 0, NULL, &pSIS->agpHandle) < 0) {
400 	     drmAgpRelease(pSIS->drmSubFD);
403 	  } else if(drmAgpBind(pSIS->drmSubFD, pSIS->agpHandle, 0) < 0) {
406 	     drmAgpFree(pSIS->drmSubFD, pSIS->agpHandle);
407 	     drmAgpRelease(pSIS->drmSubFD);
414 	  drmAgpRelease(pSIS->drmSubFD);
422 	       (int)(pSIS->agpWantedSize / (1024 * 1024)));
424     pSIS->agpSize = pSIS->agpWantedSize;
425     pSIS->agpAddr = drmAgpBase(pSIS->drmSubFD);
426     /* pSIS->agpBase = */
428     pSISDRI->agp.size = pSIS->agpSize;
429     if(drmAddMap(pSIS->drmSubFD, (drm_handle_t)0, pSISDRI->agp.size, DRM_AGP, 0, &pSISDRI->agp.handle) < 0) {
431        drmAgpUnbind(pSIS->drmSubFD, pSIS->agpHandle);
432        drmAgpFree(pSIS->drmSubFD, pSIS->agpHandle);
433        drmAgpRelease(pSIS->drmSubFD);
434        pSIS->agpSize = pSISDRI->agp.size = 0;
438     switch(pSIS->VGAEngine) {
441        pSIS->agpVtxBufSize = AGP_VTXBUF_SIZE; /* = 2MB */
442        pSIS->agpVtxBufAddr = pSIS->agpAddr;
443        pSIS->agpVtxBufBase = pSIS->agpVtxBufAddr - pSIS->agpAddr + pSIS->agpBase;
444        pSIS->agpVtxBufFree = 0;
446        pSISDRI->AGPVtxBufOffset = pSIS->agpVtxBufAddr - pSIS->agpAddr;
447        pSISDRI->AGPVtxBufSize = pSIS->agpVtxBufSize;
450        drmSiSAgpInit(pSIS->drmSubFD, AGP_VTXBUF_SIZE, (pSIS->agpSize - AGP_VTXBUF_SIZE));
456 	   agp.size = pSIS->agpSize - AGP_VTXBUF_SIZE;
457 	   drmCommandWrite(pSIS->drmSubFD, DRM_SIS_AGP_INIT, &agp, sizeof(agp));
464        pSIS->agpCmdBufSize = AGP_CMDBUF_SIZE;
465        pSIS->agpCmdBufAddr = pSIS->agpAddr;
466        pSIS->agpCmdBufBase = pSIS->agpCmdBufAddr - pSIS->agpAddr + pSIS->agpBase;
467        pSIS->agpCmdBufFree = 0;
469        pSISDRI->AGPCmdBufOffset = pSIS->agpCmdBufAddr - pSIS->agpAddr;
470        pSISDRI->AGPCmdBufSize = pSIS->agpCmdBufSize;
473        drmSiSAgpInit(pSIS->drmSubFD, AGP_CMDBUF_SIZE, (pSIS->agpSize - AGP_CMDBUF_SIZE));
479 	   agp.size = pSIS->agpSize - AGP_CMDBUF_SIZE;
480 	   drmCommandWrite(pSIS->drmSubFD, DRM_SIS_AGP_INIT, &agp, sizeof(agp));
488   pSIS->irqEnabled = FALSE;
489   pSIS->irq = drmGetInterruptFromBusID(pSIS->drmSubFD,
490 	   pSIS->PciBus, pSIS->PciDevice, pSIS->PciFunc);
492   if(pSIS->irq < 0) {
495 	   pSIS->PciBus, pSIS->PciDevice, pSIS->PciFunc,
496 	   pSIS->irq);
497   } else if((drmCtlInstHandler(pSIS->drmSubFD, pSIS->irq)) != 0) {
500 	   pSIS->irq);
504 	   pSIS->irq);
505      pSIS->irqEnabled = TRUE;
508   pSISDRI->irqEnabled = pSIS->irqEnabled;
606   SISPtr pSIS = SISPTR(pScrn);
608   switch(pSIS->VGAEngine) {
611      if(pSIS->cmdQ_SharedWritePortBackup) {
613 	pSIS->cmdQ_SharedWritePort_2D = *(pSIS->cmdQ_SharedWritePort);
614 	pSIS->cmdQ_SharedWritePort = pSIS->cmdQ_SharedWritePortBackup;
615 	pSIS->cmdQ_SharedWritePortBackup = 0;
620      if(pSIS->cmdQueueLenPtrBackup) {
622 	pSIS->cmdQueueLenPtr = pSIS->cmdQueueLenPtrBackup;
623 	*(pSIS->cmdQueueLenPtr) = 0;
628   if(pSIS->irqEnabled) {
630      drmCtlUninstHandler(pSIS->drmSubFD);
631      pSIS->irqEnabled = FALSE;
632      pSIS->irq = 0;
635   if(pSIS->agpSize){
637      drmAgpUnbind(pSIS->drmSubFD, pSIS->agpHandle);
638      drmAgpFree(pSIS->drmSubFD, pSIS->agpHandle);
640      drmAgpRelease(pSIS->drmSubFD);
641      pSIS->agpSize = 0;
646   if(pSIS->pDRIInfo) {
647      if(pSIS->pDRIInfo->devPrivate) {
648 	free(pSIS->pDRIInfo->devPrivate);
649 	pSIS->pDRIInfo->devPrivate = NULL;
651      DRIDestroyInfoRec(pSIS->pDRIInfo);
652      pSIS->pDRIInfo = NULL;