Lines Matching refs:pSiS
64 void SISVGALock(SISPtr pSiS);
65 void SiSVGAUnlock(SISPtr pSiS);
178 SISPtr pSiS = SISPTR(pScrn);
179 SISRegPtr pReg = &pSiS->ModeReg;
181 int mclk = pSiS->MemClock;
186 int buswidth = pSiS->BusWidth;
195 (*pSiS->SiSSave)(pScrn, pReg);
198 if(!pSiS->UseVESA) {
210 if(pSiS->Chipset == PCI_CHIP_SIS6326) {
211 if(pSiS->SiS6326Flags & SIS6326_HASTV) {
212 if((pSiS->SiS6326Flags & SIS6326_TVDETECTED) &&
235 if(!pSiS->UseVESA) {
241 offset = pSiS->CurrentLayout.displayWidth >> 3;
243 offset = pSiS->CurrentLayout.displayWidth >> 2;
244 if(!pSiS->UseVESA) {
250 if(!pSiS->UseVESA) {
255 if(pSiS->oldChipset >= OC_SIS5597) {
262 if(!pSiS->UseVESA) {
266 if(pSiS->oldChipset > OC_SIS6225) {
271 switch(pSiS->Chipset) {
274 if(!pSiS->HostBus) {
289 if(pSiS->Chipset == PCI_CHIP_SIS530) {
292 switch(pSiS->CurrentLayout.bitsPerPixel) {
297 if(pSiS->CurrentLayout.depth == 15)
308 if(pSiS->Chipset == PCI_CHIP_SIS530) {
310 if(pSiS->oldChipset != OC_SIS620) {
321 pSiS->scrnOffset = pSiS->CurrentLayout.displayWidth *
322 ((pSiS->CurrentLayout.bitsPerPixel + 7) / 8);
325 pSiS->DstColor = 0;
327 if(!pSiS->UseVESA) {
338 pReg->sisRegs3C4[0x20] = (pSiS->FbAddress & 0x07F80000) >> 19;
339 pReg->sisRegs3C4[0x21] = ((pSiS->FbAddress & 0xF8000000) >> 27) | temp;
354 if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
425 if( ( (pSiS->Chipset == PCI_CHIP_SIS6326) &&
426 ( (pSiS->ChipRev == 0xd0) || (pSiS->ChipRev == 0xd1) ||
427 (pSiS->ChipRev == 0xd2) || (pSiS->ChipRev == 0x92) ||
428 (pSiS->Flags & A6326REVAB) ) ) ||
429 (pSiS->oldChipset > OC_SIS6326) ) {
430 if( (pSiS->CurrentLayout.bitsPerPixel == 24) ||
431 (pSiS->CurrentLayout.bitsPerPixel == 32) ||
445 if(pSiS->oldChipset <= OC_SIS86202) {
466 if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
541 if(pSiS->oldChipset > OC_SIS6225) {
543 if(pSiS->newFastVram == -1) {
544 if(pSiS->oldChipset == OC_SIS620) {
552 } else if(pSiS->newFastVram == 1)
557 if(pSiS->oldChipset == OC_SIS620) {
559 if(pSiS->Flags & SYNCDRAM) {
570 pSiS->ValidWidth = TRUE;
572 if(pSiS->CurrentLayout.bitsPerPixel == 24) {
575 pSiS->ValidWidth = FALSE;
577 switch(pScrn->virtualX * (pSiS->CurrentLayout.bitsPerPixel >> 3)) {
590 pSiS->ValidWidth = FALSE;
596 if(!pSiS->NoAccel) {
598 if( (pSiS->TurboQueue) && /* Handle TurboQueue */
599 (pSiS->oldChipset > OC_SIS6225) &&
600 ( (pSiS->Chipset != PCI_CHIP_SIS530) ||
601 (pSiS->CurrentLayout.bitsPerPixel != 24) ) ) {
603 if((pSiS->Chipset == PCI_CHIP_SIS530) ||
604 ((pSiS->Chipset == PCI_CHIP_SIS6326 &&
605 (pSiS->ChipRev == 0xd0 || pSiS->ChipRev == 0xd1 ||
606 pSiS->ChipRev == 0xd2 || pSiS->ChipRev == 0x92 ||
607 pSiS->ChipRev == 0x0a || pSiS->ChipRev == 0x1a ||
608 pSiS->ChipRev == 0x2a || pSiS->ChipRev == 0x0b ||
609 pSiS->ChipRev == 0x1b || pSiS->ChipRev == 0x2b) ) ) ) {
617 if(pSiS->Chipset != PCI_CHIP_SIS530) { /* 530/620: Reserved (don't touch) */
626 if(!pSiS->UseVESA) {
629 if(pSiS->Chipset == PCI_CHIP_SIS6326) {
630 if((pSiS->ChipRev == 0xd0) || (pSiS->ChipRev == 0xd1) ||
631 (pSiS->ChipRev == 0xd2) || (pSiS->ChipRev == 0x92) ||
632 (pSiS->Flags & A6326REVAB)) {
633 if((pSiS->Flags & (SYNCDRAM | RAMFLAG)) == (SYNCDRAM | RAMFLAG)) {
644 if((pSiS->Chipset == PCI_CHIP_SIS5597) || (pSiS->Chipset == PCI_CHIP_SIS6326)) {
645 if(pSiS->MemClock > 66000) {
646 SiSCalcClock(pScrn, pSiS->MemClock, 1, vclk);
700 switch(pSiS->Chipset) {
703 case PCI_CHIP_SIS530: factor = (pSiS->Flags & UMA) ? 60 : 30; break;
706 a = width * height * rate * 1.40 * factor * ((pSiS->CurrentLayout.bitsPerPixel + 1) / 8);
712 if((pSiS->Flags & (RAMFLAG | SYNCDRAM)) == (RAMFLAG | SYNCDRAM)) {
720 if(pSiS->Chipset == PCI_CHIP_SIS530) {
721 if((pSiS->oldChipset == OC_SIS530A) &&
722 (pSiS->Flags & UMA) &&
724 (pSiS->Flags & ESS137xPRESENT)) {
725 if(!(pSiS->Flags & SECRETFLAG)) index = 0;
726 if((temp = SiS_CalcSpecial530Threshold(pSiS, mode, index)) {
734 switch(pSiS->Chipset) {
756 if(pSiS->oldChipset >= OC_SIS530A) {
762 if((pSiS->Chipset == PCI_CHIP_SIS6326) && (sis6326tvmode)) {
767 if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
795 if(pSiS->sis6326fscadjust) {
796 fsc += pSiS->sis6326fscadjust;
802 if(pSiS->SiS6326Flags & SIS6326_TVCVBS) tmp |= 0x10;
811 if(pSiS->SiS6326Flags & SIS6326_TVPAL) {
820 if((pSiS->ChipRev == 0xc1) || (pSiS->ChipRev == 0xc2)) {
826 if(pSiS->SiS6326Flags & SIS6326_TVCVBS) tmp &= ~0x10;
827 if(pSiS->SiS6326Flags & SIS6326_TVSVIDEO) tmp &= ~0x08;
844 SISPtr pSiS = SISPTR(pScrn);
845 SISRegPtr pReg = &pSiS->ModeReg;
853 pScrn->virtualX, pSiS->CurrentLayout.bitsPerPixel,
854 pScrn->virtualX * pSiS->CurrentLayout.bitsPerPixel/8);
857 if(pSiS->MergedFB) {
863 (*pSiS->SiSSave)(pScrn, pReg);
866 pSiS->scrnOffset = pSiS->CurrentLayout.displayWidth *
867 ((pSiS->CurrentLayout.bitsPerPixel + 7) / 8);
869 pSiS->scrnPitch = pSiS->scrnPitch2 = pSiS->scrnOffset;
870 if(!(pSiS->VBFlags & CRT1_LCDA)) {
871 if(realmode->Flags & V_INTERLACE) pSiS->scrnPitch <<= 1;
879 switch(pSiS->CurrentLayout.bitsPerPixel) {
881 pSiS->DstColor = 0x0000;
882 pSiS->SiS310_AccelDepth = 0x00000000;
885 if(pSiS->CurrentLayout.depth == 15)
886 pSiS->DstColor = (short) 0x4000;
888 pSiS->DstColor = (short) 0x8000;
889 pSiS->SiS310_AccelDepth = 0x00010000;
892 pSiS->DstColor = (short) 0xC000;
893 pSiS->SiS310_AccelDepth = 0x00020000;
904 if(!pSiS->NoAccel) {
907 switch(pSiS->VGAEngine) {
909 if(pSiS->TurboQueue) { /* set Turbo Queue as 512k */
933 SISPtr pSiS = SISPTR(pScrn);
966 SISPtr pSiS = SISPTR(pScrn);
970 pSiS->SiS6326Flags &= (SIS6326_HASTV | SIS6326_TVPAL);
975 pSiS->SiS6326Flags |= result;
977 pSiS->SiS6326Flags |= result;
981 if(pSiS->SiS6326Flags & (SIS6326_TVSVIDEO | SIS6326_TVCVBS)) {
982 pSiS->SiS6326Flags |= SIS6326_TVDETECTED;
985 (((pSiS->SiS6326Flags & (SIS6326_TVSVIDEO | SIS6326_TVCVBS)) ==
988 ((pSiS->SiS6326Flags & SIS6326_TVSVIDEO) ?
997 SISIsUMC(SISPtr pSiS)
1017 SISPtr pSiS = SISPTR(pScrn);
1048 switch(pSiS->Chipset) {
1062 pSiS->ModeInit = SIS300Init;
1065 pSiS->ModeInit = SISInit;
1068 if((pSiS->Chipset == PCI_CHIP_SIS6326) && (pSiS->SiS6326Flags & SIS6326_HASTV)) {
1072 pSiS->SiS6326Flags |= SIS6326_TVPAL;
1077 pSiS->VBFlags = pSiS->VBFlags2 = 0; /* reset VBFlags */
1078 pSiS->SiS_Pr->SiS_UseLCDA = FALSE;
1079 pSiS->SiS_Pr->Backup = FALSE;
1082 if((pSiS->VGAEngine != SIS_300_VGA) && (pSiS->VGAEngine != SIS_315_VGA))
1086 if(pSiS->ChipType == XGI_20)
1097 if(SISIsUMC(pSiS)) pSiS->VBFlags2 |= VB2_SISUMC;
1103 pSiS->VBFlags2 |= VB2_302LV;
1106 pSiS->VBFlags2 |= VB2_301C; /* VB_302ELV; */
1110 pSiS->VBFlags2 |= VB2_301LV;
1113 pSiS->VBFlags2 |= VB2_301C;
1116 pSiS->VBFlags2 |= VB2_301B;
1120 pSiS->VBFlags2 |= VB2_30xBDH;
1124 pSiS->VBFlags2 |= VB2_301;
1129 (pSiS->VBFlags2 & VB2_SISUMC) ? "UMC-0" : "Charter/UMC-1", 1, temp1);
1139 if(SISIsUMC(pSiS)) pSiS->VBFlags2 |= VB2_SISUMC;
1143 pSiS->VBFlags2 |= VB2_302LV;
1146 pSiS->VBFlags2 |= VB2_301LV;
1149 pSiS->VBFlags2 |= VB2_302B;
1154 (pSiS->VBFlags2 & VB2_SISUMC) ? "UMC-0" : "Charter/UMC-1", 2, temp1);
1164 if(pSiS->NewCRLayout) {
1171 if(pSiS->VGAEngine == SIS_300_VGA) {
1181 if(pSiS->NewCRLayout) {
1187 pSiS->VBFlags2 |= VB2_LVDS;
1193 pSiS->SiS_Pr->SiS_IF_DEF_CH70xx = chronteltype;
1197 SiS_SetChrontelGPIO(pSiS->SiS_Pr, 0x9c);
1201 temp1 = SiS_GetCH70xx(pSiS->SiS_Pr, chrontelidreg);
1204 temp2 = SiS_GetCH700x(pSiS->SiS_Pr, 0x0e);
1206 SiS_SetCH700x(pSiS->SiS_Pr, 0x0e, 0x0b);
1207 SiS_DDC2Delay(pSiS->SiS_Pr, 300);
1209 temp2 = SiS_GetCH70xx(pSiS->SiS_Pr, chrontelidreg);
1216 pSiS->postVBCR32 &= ~0x07;
1219 pSiS->VBFlags2 |= VB2_CHRONTEL;
1221 case 0x32: temp2 = 0; pSiS->ChrontelType = CHRONTEL_700x; break;
1222 case 0x3A: temp2 = 1; pSiS->ChrontelType = CHRONTEL_700x; break;
1223 case 0x50: temp2 = 2; pSiS->ChrontelType = CHRONTEL_700x; break;
1224 case 0x2A: temp2 = 3; pSiS->ChrontelType = CHRONTEL_700x; break;
1225 case 0x40: temp2 = 4; pSiS->ChrontelType = CHRONTEL_700x; break;
1226 case 0x22: temp2 = 5; pSiS->ChrontelType = CHRONTEL_700x; break;
1227 case 0x19: temp2 = 6; pSiS->ChrontelType = CHRONTEL_701x; break;
1228 case 0x20: temp2 = 7; pSiS->ChrontelType = CHRONTEL_701x; break; /* ID for 7020? */
1229 default: temp2 = 8; pSiS->ChrontelType = CHRONTEL_701x; break;
1245 pSiS->postVBCR32 &= ~0x07;
1250 pSiS->postVBCR32 &= ~0x07;
1254 SiS_SetChrontelGPIO(pSiS->SiS_Pr, 0x00);
1257 if((pSiS->NewCRLayout) && (temp == 4)) {
1258 pSiS->VBFlags2 |= VB2_CONEXANT;
1262 if((pSiS->VGAEngine == SIS_300_VGA) && (temp == 3)) {
1263 pSiS->VBFlags2 |= VB2_TRUMPION;
1285 if( (pSiS->VGAEngine == SIS_300_VGA) &&
1286 (pSiS->Chipset != PCI_CHIP_SIS300) &&
1297 pSiS->postVBCR32 |= 0x20;
1300 pSiS->postVBCR32 &= ~0x20;
1305 pSiS->postVBCR32 |= 0x08;
1308 pSiS->postVBCR32 &= ~0x08;
1313 pSiS->postVBCR32 &= ~0xc0;
1322 if(pSiS->VGAEngine == SIS_315_VGA) {
1324 if(pSiS->VBFlags2 & VB2_SISLCDABRIDGE) {
1325 if(pSiS->sisfblcda != 0xff) {
1326 if((pSiS->sisfblcda & 0x03) == 0x03) {
1327 pSiS->SiS_Pr->SiS_UseLCDA = TRUE;
1328 pSiS->ChipFlags |= SiSCF_UseLCDA;
1335 pSiS->SiS_Pr->SiS_UseLCDA = TRUE;
1336 pSiS->ChipFlags |= SiSCF_UseLCDA;
1337 pSiS->SiS_Pr->Backup = TRUE;
1342 pSiS->SiS_Pr->SiS_UseLCDA = TRUE;
1343 pSiS->ChipFlags |= SiSCF_UseLCDA;
1344 pSiS->SiS_Pr->Backup = TRUE;
1349 if(pSiS->ChipFlags & SiSCF_UseLCDA) {
1352 if(pSiS->SiS_Pr->Backup == TRUE) {
1353 inSISIDXREG(SISCR,0x34,pSiS->SiS_Pr->Backup_Mode);
1354 inSISIDXREG(SISPART1,0x14,pSiS->SiS_Pr->Backup_14);
1355 inSISIDXREG(SISPART1,0x15,pSiS->SiS_Pr->Backup_15);
1356 inSISIDXREG(SISPART1,0x16,pSiS->SiS_Pr->Backup_16);
1357 inSISIDXREG(SISPART1,0x17,pSiS->SiS_Pr->Backup_17);
1358 inSISIDXREG(SISPART1,0x18,pSiS->SiS_Pr->Backup_18);
1359 inSISIDXREG(SISPART1,0x19,pSiS->SiS_Pr->Backup_19);
1360 inSISIDXREG(SISPART1,0x1a,pSiS->SiS_Pr->Backup_1a);
1361 inSISIDXREG(SISPART1,0x1b,pSiS->SiS_Pr->Backup_1b);
1362 inSISIDXREG(SISPART1,0x1c,pSiS->SiS_Pr->Backup_1c);
1363 inSISIDXREG(SISPART1,0x1d,pSiS->SiS_Pr->Backup_1d);
1371 SiS_WriteAttr(SISPtr pSiS, int index, int value)
1380 SiS_ReadAttr(SISPtr pSiS, int index)
1389 SiS_EnablePalette(SISPtr pSiS)
1393 pSiS->VGAPaletteEnabled = TRUE;
1397 SiS_DisablePalette(SISPtr pSiS)
1401 pSiS->VGAPaletteEnabled = FALSE;
1405 SISVGALock(SISPtr pSiS)
1411 SiSVGAUnlock(SISPtr pSiS)
1422 SISPtr pSiS = SISPTR(pScrn);
1423 pointer vgaMemBase = pSiS->VGAMemBase;
1426 if((pSiS->fonts) || (vgaMemBase == NULL)) return;
1429 attr10 = SiS_ReadAttr(pSiS, 0x10);
1432 if(!(pSiS->fonts = malloc(SIS_FONTS_SIZE * 2))) {
1454 SiS_WriteAttr(pSiS, 0x10, 0x01); /* graphics mode */
1462 slowbcopy_frombus(vgaMemBase, pSiS->fonts, SIS_FONTS_SIZE);
1470 slowbcopy_frombus(vgaMemBase, pSiS->fonts + SIS_FONTS_SIZE, SIS_FONTS_SIZE);
1478 SiS_WriteAttr(pSiS, 0x10, attr10);
1491 SISPtr pSiS = SISPTR(pScrn);
1500 SiS_EnablePalette(pSiS);
1502 save->sisRegsATTR[i] = SiS_ReadAttr(pSiS, i);
1504 SiS_DisablePalette(pSiS);
1518 SISPtr pSiS = SISPTR(pScrn);
1521 if(pSiS->VGACMapSaved) return;
1532 SiS_DisablePalette(pSiS);
1533 pSiS->VGACMapSaved = TRUE;
1550 SISPtr pSiS = SISPTR(pScrn);
1551 pointer vgaMemBase = pSiS->VGAMemBase;
1554 if((!pSiS->fonts) || (vgaMemBase == NULL)) return;
1558 attr10 = SiS_ReadAttr(pSiS, 0x10);
1575 SiS_WriteAttr(pSiS, 0x10, 0x01); /* graphics mode */
1587 slowbcopy_tobus(pSiS->fonts, vgaMemBase, SIS_FONTS_SIZE);
1594 slowbcopy_tobus(pSiS->fonts + SIS_FONTS_SIZE, vgaMemBase, SIS_FONTS_SIZE);
1603 SiS_WriteAttr(pSiS, 0x10, attr10);
1618 SISPtr pSiS = SISPTR(pScrn);
1637 SiS_EnablePalette(pSiS);
1639 SiS_WriteAttr(pSiS, i, restore->sisRegsATTR[i]);
1641 SiS_DisablePalette(pSiS);
1648 SISPtr pSiS = SISPTR(pScrn);
1651 if(!pSiS->VGACMapSaved) return;
1662 SiS_DisablePalette(pSiS);
1676 SiS_SeqReset(SISPtr pSiS, Bool start)
1688 SISPtr pSiS = SISPTR(pScrn);
1695 SiS_SeqReset(pSiS, TRUE); /* start synchronous reset */
1697 SiS_EnablePalette(pSiS);
1700 SiS_SeqReset(pSiS, FALSE); /* clear synchronous reset */
1701 SiS_DisablePalette(pSiS);
1709 SISPtr pSiS = SISPTR(pScrn);
1712 if(pSiS->VGAMemBase) return TRUE;
1714 if(pSiS->VGAMapSize == 0) pSiS->VGAMapSize = (64 * 1024);
1715 if(pSiS->VGAMapPhys == 0) pSiS->VGAMapPhys = 0xA0000;
1719 (void) pci_device_map_legacy(pSiS->PciInfo, pSiS->VGAMapPhys, pSiS->VGAMapSize,
1720 PCI_DEV_MAP_FLAG_WRITABLE, &pSiS->VGAMemBase);
1722 pSiS->VGAMemBase = xf86MapDomainMemory(pScrn->scrnIndex, VIDMEM_MMIO_32BIT,
1723 pSiS->PciTag, pSiS->VGAMapPhys, pSiS->VGAMapSize);
1726 pSiS->VGAMemBase = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO_32BIT,
1727 pSiS->VGAMapPhys, pSiS->VGAMapSize);
1730 return(pSiS->VGAMemBase != NULL);
1736 SISPtr pSiS = SISPTR(pScrn);
1738 if(pSiS->VGAMemBase == NULL) return;
1741 (void) pci_device_unmap_legacy(pSiS->PciInfo, pSiS->VGAMemBase, pSiS->VGAMapSize);
1743 xf86UnMapVidMem(pScrn->scrnIndex, pSiS->VGAMemBase, pSiS->VGAMapSize);
1746 pSiS->VGAMemBase = NULL;
1815 SISPtr pSiS = SISPTR(pScrn);
1816 SISRegPtr regp = &pSiS->ModeReg;
1929 SISPtr pSiS = SISPTR(pScrn);
1941 SiS_SeqReset(pSiS, TRUE);
1943 SiS_SeqReset(pSiS, FALSE);