Cross Reference: /xsrc/external/mit/xf86-video-tdfx/dist/src/tdfx

Lines Matching refs:PCI_WRITE_LONG
24       PCI_WRITE_LONG(v & ~(CFG_SNOOP_MEMBASE0 | CFG_SNOOP_EN |
32       PCI_WRITE_LONG(v & ~(CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN | 
41       PCI_WRITE_LONG(v & ~(CFG_AA_LFB_CPU_WR_EN | CFG_AA_LFB_DPTCH_WR_EN |
46       PCI_WRITE_LONG((v & ~CFG_VGA_VSYNC_OFFSET) |
52       PCI_WRITE_LONG(0, CFG_VIDEO_CTRL0, i);
53       PCI_WRITE_LONG(0, CFG_VIDEO_CTRL1, i);
54       PCI_WRITE_LONG(0, CFG_VIDEO_CTRL2, i);
157 	PCI_WRITE_LONG(v |
163 	  PCI_WRITE_LONG(v | CFG_SNOOP_EN, CFG_INIT_ENABLE, i);
174 	  PCI_WRITE_LONG(v, CFG_INIT_ENABLE, i);
179 	  PCI_WRITE_LONG(v, CFG_PCI_DECODE, i);
196 	PCI_WRITE_LONG(v, CFG_SLI_LFB_CTRL, i);
211       PCI_WRITE_LONG((sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
236       PCI_WRITE_LONG(v, CFG_SLI_LFB_CTRL, i);
277       PCI_WRITE_LONG((v & ~CFG_VGA_VSYNC_OFFSET) |
285 	PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN | 
290 	PCI_WRITE_LONG(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT |
295 	PCI_WRITE_LONG(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT |
302 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN | 
308 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
313 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
317 	  PCI_WRITE_LONG((CFG_ENHANCED_VIDEO_EN |
324 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
329 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
336 	PCI_WRITE_LONG((CFG_ENHANCED_VIDEO_EN |
343 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
351 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
356 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
363 	  PCI_WRITE_LONG((CFG_ENHANCED_VIDEO_EN |
370 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
375 	  PCI_WRITE_LONG(((0x0<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
379 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
387 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
393 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
402 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
409 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
416 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
420 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
428 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
436 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
443 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
451 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
456 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
460 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
469 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
475 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
484 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
489 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
494 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
498 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
504 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
509 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
516 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
522 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
530 	PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
535 	PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
541 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
547 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
554 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
558 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
565 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
572 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
579 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
587 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
593 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
599 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
607 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
613 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
621 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
630 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
636 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
641 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
650 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
656 	  PCI_WRITE_LONG((((pTDFX->numChips-1)<<sliLinesLog2) <<
664 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
670 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
675 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
679 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
687 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
692 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
696 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
703 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
708 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
715 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
721 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
726 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
730 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
738 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
743 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
747 	  PCI_WRITE_LONG(CFG_ENHANCED_VIDEO_EN |
754 	  PCI_WRITE_LONG(((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
759 	  PCI_WRITE_LONG((0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
766 	PCI_WRITE_LONG(v | CFG_AA_LFB_RD_SLV_WAIT, CFG_SLI_AA_MISC, i);
770 	PCI_WRITE_LONG(v | CFG_VIDPLL_SEL, CFG_VIDEO_CTRL0, i);