Lines Matching refs:pTga
57 #define FB_OFFSET(x, y) (((long)(y) * pScrn->displayWidth * (pTga->Bpp)) + (long)(x) * pTga->Bpp)
104 TGAPtr pTga;
107 pTga = TGAPTR(pScrn);
117 pTga->depthflag = BPP8PACKED;
118 pTga->Bpp = 1;
120 pTga->depthflag = BPP24;
121 pTga->Bpp = 4;
157 pTga->buffers[0] = (CARD32 *)xnfalloc(CE_BUFSIZE);
159 (unsigned char **)pTga->buffers;
170 if(pTga->NoXaaPolySegment == FALSE)
176 if(pTga->NoXaaPolySegment == FALSE)
189 pTga->Bpp);
210 TGAPtr pTga = NULL;
214 pTga = TGAPTR(pScrn);
219 if(pTga->depthflag == BPP8PACKED) {
230 pTga->current_rop = rop | pTga->depthflag;
233 pTga->transparent_pattern_p = 1;
235 pTga->block_or_opaque_p = USE_BLOCK_FILL;
238 if(pTga->depthflag == BPP24) {
248 pTga->block_or_opaque_p = USE_OPAQUE_FILL;
253 pTga->transparent_pattern_p = 0;
259 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
274 TGAPtr pTga;
277 pTga = TGAPTR(pScrn);
284 pTga->ce_height = h;
285 pTga->ce_width = w;
286 pTga->ce_x = x;
287 pTga->ce_y = y;
288 pTga->ce_skipleft = skipleft;
291 if(pTga->transparent_pattern_p) {
292 if(pTga->block_or_opaque_p == USE_BLOCK_FILL)
293 TGA_FAST_WRITE_REG(BLOCKSTIPPLE | X11 | pTga->depthflag,
296 TGA_FAST_WRITE_REG(TRANSPARENTSTIPPLE | X11 | pTga->depthflag,
302 TGA_FAST_WRITE_REG(OPAQUESTIPPLE | X11 | pTga->depthflag,
315 TGAPtr pTga;
330 pTga = TGAPTR(pScrn);
334 align_mask = (pTga->depthflag == BPP24) ? 0x0f : 0x03;
338 if(pTga->transparent_pattern_p)
342 p = (unsigned char *)pTga->buffers[0];
343 addr = FB_OFFSET(pTga->ce_x, pTga->ce_y);
344 width = pTga->ce_width;
345 skipleft = pTga->ce_skipleft;
348 if(!pTga->transparent_pattern_p)
351 align = (addr & align_mask) / pTga->Bpp; /* no. pixels out of align */
353 if (!pTga->transparent_pattern_p)
356 addr -= align * pTga->Bpp;
375 if (!pTga->transparent_pattern_p) {
388 /* ErrorF("transparent scanline with x = %d, y = %d, w = %d, h = %d\n", pTga->ce_x, pTga->ce_y, pTga->ce_width, pTga->ce_height); */
401 switch (pTga->Chipset) {
403 *(unsigned int *)(pTga->FbBase + addr) = stipple; WMB;
409 addr += 32 * pTga->Bpp;
413 pTga->ce_height--;
414 if(pTga->ce_height == 0) {
415 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag,
417 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
421 pTga->ce_y += 1;
438 TGAPtr pTga;
442 pTga = TGAPTR(pScrn);
447 if(pTga->depthflag == BPP8PACKED) {
459 pTga->block_or_opaque_p = USE_BLOCK_FILL;
462 if(pTga->depthflag == BPP24) {
472 pTga->block_or_opaque_p = USE_OPAQUE_FILL;
473 pTga->current_rop = rop | pTga->depthflag;
478 pTga->current_planemask = pmask;
495 TGAPtr pTga;
498 pTga = TGAPTR(pScrn);
504 if(pTga->block_or_opaque_p == USE_OPAQUE_FILL) {
505 mode_reg = OPAQUEFILL | X11 | pTga->depthflag;
506 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
510 mode_reg = BLOCKFILL | X11 | pTga->depthflag;
513 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
523 if(pTga->block_or_opaque_p == USE_OPAQUE_FILL)
530 mode_reg = SIMPLE | X11 | pTga->depthflag;
532 if(pTga->block_or_opaque_p == USE_OPAQUE_FILL)
533 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag,
555 TGAPtr pTga;
559 pTga = TGAPTR(pScrn);
565 if (pTga->depthflag == BPP8PACKED) {
572 pTga->current_planemask = pmask;
575 pTga->current_rop = rop | pTga->depthflag;
579 pTga->blitdir = BLIT_FORWARDS;
582 pTga->blitdir = BLIT_BACKWARDS;
608 TGAPtr pTga;
611 pTga = TGAPTR(pScrn);
618 (pTga->blitdir == BLIT_FORWARDS)?"FWD":"BWD");
622 TGA_FAST_WRITE_REG(COPY | X11 | pTga->depthflag, TGA_MODE_REG);
623 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
624 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
632 if(pTga->blitdir == BLIT_FORWARDS) {
646 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
647 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
669 TGAPtr pTga;
672 pTga = TGAPTR(pScrn);
678 if (pTga->Chipset == PCI_CHIP_DEC21030 && pTga->depthflag == BPP24) {
700 mask_source <<= source_align / pTga->Bpp;
705 mask_destination <<= destination_align / pTga->Bpp;
714 mask_destination <<= 8 / pTga->Bpp;
719 switch (pTga->Chipset) {
721 *(unsigned int *)(pTga->FbBase + source_address) = mask_source; WMB;
722 *(unsigned int *)(pTga->FbBase + destination_address) = mask_destination; WMB;
733 source_address += (cando - (pixel_shift / pTga->Bpp)) * pTga->Bpp;
734 destination_address += cando * pTga->Bpp;
737 read -= destination_align / pTga->Bpp; /* "read" is perhaps better
740 read -= 8 / pTga->Bpp;
768 TGAPtr pTga;
771 pTga = TGAPTR(pScrn);
777 if (pTga->Chipset == PCI_CHIP_DEC21030 && pTga->depthflag == BPP24) {
814 tmp_src = a1 + (w - (source_align / pTga->Bpp)) * pTga->Bpp;
815 tmp_dest = a2 + (w - (destination_align / pTga->Bpp) - (8 / pTga->Bpp)) * pTga->Bpp;
817 tmp_dest_mask = ((unsigned int)0x000000FF) >> (8 - destination_align) / pTga->Bpp;
818 tmp_dest_mask <<= 8 / pTga->Bpp;
825 switch (pTga->Chipset)
828 *(unsigned int *)(pTga->FbBase + tmp_src) = tmp_src_mask; WMB;
829 *(unsigned int *)(pTga->FbBase + tmp_dest) = tmp_dest_mask; WMB;
841 mask_source >>= (8 - source_align) / pTga->Bpp;
842 mask_source >>= destination_align / pTga->Bpp;
843 mask_destination >>= destination_align / pTga->Bpp;
853 mask_source >>= (8 - source_align) / pTga->Bpp;
858 mask_destination >>= (8 - destination_align) / pTga->Bpp;
867 mask_source >>= 8 / pTga->Bpp;
879 switch (pTga->Chipset) {
881 *(unsigned int *)(pTga->FbBase + source_address) = mask_source; WMB;
882 *(unsigned int *)(pTga->FbBase + destination_address) = mask_destination; WMB;
898 source_address -= cando * pTga->Bpp - 8;
899 destination_address -= (cando - (pixel_shift / pTga->Bpp)) * pTga->Bpp;
901 read += (cando - 8 / pTga->Bpp) + source_align / pTga->Bpp;
903 read += cando - 8 / pTga->Bpp;
906 source_address -= cando * pTga->Bpp;
907 destination_address -= cando * pTga->Bpp;
909 read += (cando - (8 - destination_align) / pTga->Bpp);
914 source_address -= cando * pTga->Bpp - 8;
915 destination_address -= (cando - (pixel_shift / pTga->Bpp)) * pTga->Bpp;
918 read += (cando - 16 / pTga->Bpp) + source_align / pTga->Bpp;
920 read += cando - pixel_shift / pTga->Bpp;
935 TGAPtr pTga;
939 pTga = TGAPTR(pScrn);
947 pTga->transparent_pattern_p = 1;
949 pTga->transparent_pattern_p = 0;
952 pTga->block_or_opaque_p = USE_BLOCK_FILL;
954 pTga->block_or_opaque_p = USE_OPAQUE_FILL;
956 if(pTga->depthflag == BPP8PACKED) {
969 if(pTga->transparent_pattern_p &&
970 pTga->block_or_opaque_p == USE_BLOCK_FILL) {
974 if(pTga->depthflag == BPP24) {
983 else if(pTga->transparent_pattern_p) {
991 pTga->current_rop = rop;
992 pTga->current_planemask = pmask;
1002 TGAPtr pTga;
1013 pTga = TGAPTR(pScrn);
1019 if(pTga->block_or_opaque_p == USE_OPAQUE_FILL)
1020 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
1022 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1023 if(pTga->depthflag == BPP8PACKED)
1043 if((pTga->block_or_opaque_p == USE_BLOCK_FILL) && pTga->transparent_pattern_p) {
1045 TGA_FAST_WRITE_REG(BLOCKFILL | X11 | pTga->depthflag, TGA_MODE_REG);
1053 else if(pTga->transparent_pattern_p) {
1055 TGA_FAST_WRITE_REG(TRANSPARENTFILL | X11 | pTga->depthflag, TGA_MODE_REG);
1064 TGA_FAST_WRITE_REG(OPAQUEFILL | X11 | pTga->depthflag, TGA_MODE_REG);
1072 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
1073 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
1088 TGAPtr pTga = NULL;
1092 pTga = TGAPTR(pScrn);
1097 if(pTga->depthflag == BPP8PACKED) {
1108 pTga->current_rop = rop | pTga->depthflag;
1110 pTga->current_planemask = pmask;
1139 TGAPtr pTga = NULL;
1144 pTga = TGAPTR(pScrn);
1149 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
1150 TGA_FAST_WRITE_REG(OPAQUELINE | X11 | pTga->depthflag |
1152 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1203 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
1204 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
1219 TGAPtr pTga = NULL;
1223 pTga = TGAPTR(pScrn);
1228 /* TGA_FAST_WRITE_REG(pTga->current_rop | BPP8PACKED, TGA_RASTEROP_REG); */
1282 TGAPtr pTga = NULL;
1287 pTga = TGAPTR(pScrn);
1295 TGA_FAST_WRITE_REG(pTga->current_rop | pTga->depthflag, TGA_RASTEROP_REG);
1296 TGA_FAST_WRITE_REG(OPAQUELINE | X11 | pTga->depthflag, TGA_MODE_REG);
1297 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1310 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
1311 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
1312 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1328 TGAPtr pTga = NULL;
1332 pTga = TGAPTR(pScrn);
1337 if(pTga->depthflag == BPP8PACKED) {
1349 pTga->current_rop = rop | pTga->depthflag;
1351 pTga->current_planemask = pmask;
1353 pTga->transparent_pattern_p = 1;
1355 pTga->transparent_pattern_p = 0;
1359 pTga->line_pattern = pattern[0] | (pattern[1] << 8);
1360 pTga->line_pattern_length = length;
1375 TGAPtr pTga = NULL;
1383 pTga = TGAPTR(pScrn);
1388 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
1389 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1390 if(pTga->transparent_pattern_p)
1391 TGA_FAST_WRITE_REG(TRANSPARENTLINE | X11 | pTga->depthflag |
1395 TGA_FAST_WRITE_REG(OPAQUELINE | X11 | pTga->depthflag |
1440 line_mask = pTga->line_pattern >> phase;
1441 l = (pTga->line_pattern_length - phase);
1444 line_mask = pTga->line_pattern;
1445 l = pTga->line_pattern_length;
1449 line_mask |= pTga->line_pattern << l;
1450 l += pTga->line_pattern_length;
1466 line_mask = pTga->line_pattern >> (pTga->line_pattern_length -
1471 line_mask = pTga->line_pattern;
1472 l = pTga->line_pattern_length;
1475 line_mask |= (pTga->line_pattern << l);
1476 l += pTga->line_pattern_length;
1484 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
1485 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);
1500 TGAPtr pTga = NULL;
1508 pTga = TGAPTR(pScrn);
1516 TGA_FAST_WRITE_REG(pTga->current_rop, TGA_RASTEROP_REG);
1517 TGA_FAST_WRITE_REG(pTga->current_planemask, TGA_PLANEMASK_REG);
1519 if(pTga->transparent_pattern_p)
1520 TGA_FAST_WRITE_REG(TRANSPARENTLINE | X11 | pTga->depthflag, TGA_MODE_REG);
1522 TGA_FAST_WRITE_REG(OPAQUELINE | X11 | pTga->depthflag, TGA_MODE_REG);
1529 line_mask = pTga->line_pattern >> phase;
1530 l = (pTga->line_pattern_length - phase);
1533 line_mask = pTga->line_pattern;
1534 l = pTga->line_pattern_length;
1538 line_mask |= pTga->line_pattern << l;
1539 l += pTga->line_pattern_length;
1548 line_mask = pTga->line_pattern >> (pTga->line_pattern_length -
1553 line_mask = pTga->line_pattern;
1554 l = pTga->line_pattern_length;
1557 line_mask |= (pTga->line_pattern << l);
1558 l += pTga->line_pattern_length;
1568 TGA_FAST_WRITE_REG(SIMPLE | X11 | pTga->depthflag, TGA_MODE_REG);
1569 TGA_FAST_WRITE_REG(MIX_SRC | pTga->depthflag, TGA_RASTEROP_REG);