Lines Matching refs:OUTB
248 OUTB(0x3C4, Protection);
250 OUTB(0x3C5, 0x92);
253 OUTB(0x3C4, 0x0B); INB(0x3C5); /* Ensure we are in New Mode */
258 OUTB(0x3CE, MiscExtFunc);
280 OUTB(0x3CE, CyberControl);
283 OUTB(0x3CE, FPConfig);
301 OUTB(0x3CE, CyberEnhance);
318 OUTB(0x3CE, CyberControl);
321 OUTB(0x3CE,HorStretch);
323 OUTB(0x3CE,VertStretch);
334 OUTB(vgaIOBase + 4,0);
336 OUTB(vgaIOBase + 4,3);
338 OUTB(vgaIOBase + 4,4);
340 OUTB(vgaIOBase + 4,5);
342 OUTB(vgaIOBase + 4,0x6);
478 OUTB(vgaIOBase + 4,PreEndControl);
480 OUTB(vgaIOBase + 4,PreEndFetch);
535 OUTB(vgaIOBase + 4, RAMDACTiming);
601 OUTB(vgaIOBase+ 4, New32);
624 OUTB(vgaIOBase+ 4, New32);
665 OUTB(vgaIOBase+ 4, InterfaceSel);
668 OUTB(vgaIOBase+ 4, Performance);
673 OUTB(vgaIOBase+ 4, DRAMControl);
681 OUTB(vgaIOBase + 4, ClockControl);
685 OUTB(vgaIOBase+ 4, AddColReg);
702 OUTB(0x3CE, MiscIntContReg);
709 OUTB(vgaIOBase+ 4, PCIReg);
735 OUTB(0x3C4,0x20);
739 OUTB(0x3C4,0x12);
747 OUTB(0x3C4, Protection);
748 OUTB(0x3C5, protect);
770 OUTB(0x3C4, Protection);
771 OUTB(0x3C5, 0x92);
779 OUTB(0x3C4, 0x0B);
790 OUTB(0x3C6, tridentReg->tridentRegsDAC[0x00]);
888 OUTB(0x43C8, tridentReg->tridentRegsClock[0x01]);
889 OUTB(0x43C9, tridentReg->tridentRegsClock[0x02]);
892 OUTB(0x43C6, tridentReg->tridentRegsClock[0x03]);
893 OUTB(0x43C7, tridentReg->tridentRegsClock[0x04]);
900 OUTB(0x3C2, tridentReg->tridentRegsClock[0x00]);
904 OUTB(0x3C4, Protection);
905 OUTB(0x3C5, tridentReg->tridentRegs3C4[Protection]);
919 OUTB(0x3C4, 0x0B);
1020 OUTB(0x3C4, ClockLow);
1022 OUTB(0x3C4, ClockHigh);
1025 OUTB(0x3C4, MCLKLow);
1027 OUTB(0x3C4, MCLKHigh);
1225 OUTB(0x3C4, 0x0B); temp = INB(0x3C5);
1227 OUTB(0x3C4, NewMode1);
1229 OUTB(0x3C5, temp | 0x80);
1241 OUTB(vgaIOBase + 4, I2C);
1271 OUTB(0x3C6, 0xFF);
1273 OUTB(0x3c8, index);
1275 OUTB(0x3c9, colors[index].red);
1277 OUTB(0x3c9, colors[index].green);
1279 OUTB(0x3c9, colors[index].blue);