Lines Matching refs:pTseng
7 #define MMU_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x13<<0, x)
8 #define ACL_SUSPEND_TERMINATE(x) MMIO_OUT8(pTseng->MMioBase, 0x30<<0, x)
9 #define ACL_OPERATION_STATE(x) MMIO_OUT8(pTseng->MMioBase, 0x31<<0, x)
11 #define ACL_SYNC_ENABLE(x) MMIO_OUT8(pTseng->MMioBase, 0x32<<0, x)
15 MMIO_OUT8(pTseng->MMioBase, 0x35<<0, x)
16 #define ACL_INTERRUPT_MASK(x) MMIO_OUT8(pTseng->MMioBase, 0x34<<0, x)
19 MMIO_OUT8(pTseng->MMioBase, ACL_ACCELERATOR_STATUS, x)
23 #define ACL_POWER_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x37<<0, x)
26 #define ACL_NQ_X_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x38<<0, x)
27 #define ACL_NQ_Y_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x3A<<0, x)
29 #define ACL_X_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x94<<0, x)
30 #define ACL_Y_POSITION(x) MMIO_OUT16(pTseng->MMioBase, 0x96<<0, x)
32 #define ACL_PATTERN_ADDRESS(x) MMIO_OUT32(pTseng->MMioBase, 0x80<<0, x)
33 #define ACL_SOURCE_ADDRESS(x) MMIO_OUT32(pTseng->MMioBase, 0x84<<0, x)
35 #define ACL_PATTERN_Y_OFFSET(x) MMIO_OUT16(pTseng->MMioBase, 0x88<<0, x)
36 #define ACL_PATTERN_Y_OFFSET32(x) MMIO_OUT32(pTseng->MMioBase, 0x88<<0, x)
37 #define ACL_SOURCE_Y_OFFSET(x) MMIO_OUT16(pTseng->MMioBase, 0x8A<<0, x)
38 #define ACL_DESTINATION_Y_OFFSET(x) MMIO_OUT16(pTseng->MMioBase, 0x8C<<0, x)
41 #define ACL_VIRTUAL_BUS_SIZE(x) MMIO_OUT8(pTseng->MMioBase, 0x8E<<0, x)
43 #define ACL_PIXEL_DEPTH(x) MMIO_OUT8(pTseng->MMioBase, 0x8E<<0, x)
46 #define ACL_XY_DIRECTION(x) MMIO_OUT8(pTseng->MMioBase, 0x8F<<0, x)
48 #define ACL_PATTERN_WRAP(x) MMIO_OUT8(pTseng->MMioBase, 0x90<<0, x)
49 #define ACL_PATTERN_WRAP32(x) MMIO_OUT32(pTseng->MMioBase, 0x90<<0, x)
50 #define ACL_TRANSFER_DISABLE(x) MMIO_OUT8(pTseng->MMioBase, 0x91<<0, x) /* ET6000 only */
51 #define ACL_SOURCE_WRAP(x) MMIO_OUT8(pTseng->MMioBase, 0x92<<0, x)
53 #define ACL_X_COUNT(x) MMIO_OUT16(pTseng->MMioBase, 0x98<<0, x)
54 #define ACL_Y_COUNT(x) MMIO_OUT16(pTseng->MMioBase, 0x9A<<0, x)
56 #define ACL_XY_COUNT(x) MMIO_OUT32(pTseng->MMioBase, 0x98<<0, x)
58 #define ACL_ROUTING_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x9C<<0, x)
60 #define ACL_RELOAD_CONTROL(x) MMIO_OUT8(pTseng->MMioBase, 0x9D<<0, x)
63 #define ACL_BACKGROUND_RASTER_OPERATION(x) MMIO_OUT8(pTseng->MMioBase, 0x9E<<0, x)
64 #define ACL_FOREGROUND_RASTER_OPERATION(x) MMIO_OUT8(pTseng->MMioBase, 0x9F<<0, x)
66 #define ACL_DESTINATION_ADDRESS(x) MMIO_OUT32(pTseng->MMioBase, 0xA0<<0, x)
69 #define ACL_MIX_ADDRESS(x) MMIO_OUT32(pTseng->MMioBase, 0xA4<<0, x)
71 #define ACL_MIX_Y_OFFSET(x) MMIO_OUT16(pTseng->MMioBase, 0xA8<<0, x)
72 #define ACL_ERROR_TERM(x) MMIO_OUT16(pTseng->MMioBase, 0xAA<<0, x)
73 #define ACL_DELTA_MINOR(x) MMIO_OUT16(pTseng->MMioBase, 0xAC<<0, x)
74 #define ACL_DELTA_MINOR32(x) MMIO_OUT32(pTseng->MMioBase, 0xAC<<0, x)
75 #define ACL_DELTA_MAJOR(x) MMIO_OUT16(pTseng->MMioBase, 0xAE<<0, x)
78 #define ACL_SECONDARY_EDGE(x) MMIO_OUT8(pTseng->MMioBase, 0x93<<0, x)
79 #define ACL_SECONDARY_ERROR_TERM(x) MMIO_OUT16(pTseng->MMioBase, 0xB2<<0, x)
80 #define ACL_SECONDARY_DELTA_MINOR(x) MMIO_OUT16(pTseng->MMioBase, 0xB4<<0, x)
81 #define ACL_SECONDARY_DELTA_MINOR32(x) MMIO_OUT32(pTseng->MMioBase, 0xB4<<0, x)
82 #define ACL_SECONDARY_DELTA_MAJOR(x) MMIO_OUT16(pTseng->MMioBase, 0xB6<<0, x)
98 void tseng_recover_timeout(TsengPtr pTseng);
101 tseng_wait(TsengPtr pTseng, int reg, char *name, unsigned char mask)
105 while ((MMIO_IN32(pTseng->MMioBase,reg)) & mask)
108 tseng_recover_timeout(pTseng);
116 #define WAIT_QUEUE tseng_wait(pTseng, ACL_ACCELERATOR_STATUS, "QUEUE", 0x1)
119 #define WAIT_INTERFACE tseng_wait(pTseng, ACL_WRITE_INTERFACE_VALID, "INTERFACE", 0xf)
121 #define WAIT_ACL tseng_wait(pTseng, ACL_ACCELERATOR_STATUS, "ACL", 0x2)
123 #define WAIT_XY tseng_wait(pTseng, ACL_ACCELERATOR_STATUS, "XY", 0x4)
126 if (pTseng->ChipType == ET6000) \
134 #define FBADDR(pTseng, x,y) ( (y) * pTseng->line_width + MULBPP(pTseng, x) )
167 if ((dir) != pTseng->tseng_old_dir) \
168 pTseng->tseng_old_dir = (dir); \
169 ACL_XY_DIRECTION(pTseng->tseng_old_dir);
176 #define START_ACL(pTseng, dst) \
183 #define START_ACL_CPU(pTseng, dst) \
193 COLOR_REPLICATE_DWORD(TsengPtr pTseng, int color)
195 switch (pTseng->Bytesperpixel) {
216 SET_FG_COLOR(TsengPtr pTseng, int color)
218 ACL_SOURCE_ADDRESS(pTseng->AccelColorBufferOffset + pTseng->tsengFg);
220 color = COLOR_REPLICATE_DWORD(pTseng, color);
221 MMIO_OUT32(pTseng->scratchMemBase, pTseng->tsengFg, color);
227 SET_BG_COLOR(TsengPtr pTseng, int color)
229 ACL_PATTERN_ADDRESS(pTseng->AccelColorBufferOffset + pTseng->tsengPat);
231 color = COLOR_REPLICATE_DWORD(pTseng, color);
232 MMIO_OUT32(pTseng->scratchMemBase,pTseng->tsengPat, color);
244 SET_FG_BG_COLOR(TsengPtr pTseng, int fgcolor, int bgcolor)
246 ACL_PATTERN_ADDRESS(pTseng->AccelColorBufferOffset + pTseng->tsengPat);
247 ACL_SOURCE_ADDRESS(pTseng->AccelColorBufferOffset + pTseng->tsengFg);
249 fgcolor = COLOR_REPLICATE_DWORD(pTseng, fgcolor);
250 bgcolor = COLOR_REPLICATE_DWORD(pTseng, bgcolor);
251 MMIO_OUT32(pTseng->scratchMemBase,pTseng->tsengFg, fgcolor);
252 MMIO_OUT32(pTseng->scratchMemBase,pTseng->tsengPat, bgcolor);
262 MULBPP(TsengPtr pTseng, int x)
264 return (x * pTseng->Bytesperpixel);
268 MULBPP(TsengPtr pTseng, int x)
270 int result = x << pTseng->powerPerPixel;
272 if (pTseng->Bytesperpixel != 3)
280 CALC_XY(TsengPtr pTseng, int x, int y)
284 if ((pTseng->old_y == y) && (pTseng->old_x == x))
287 if (pTseng->ChipType == ET4000)
288 new_x = MULBPP(pTseng, x - 1);
290 new_x = MULBPP(pTseng, x) - 1;
292 pTseng->old_x = x;
293 pTseng->old_y = y;
299 SET_XY(TsengPtr pTseng, int x, int y)
303 if (pTseng->ChipType == ET4000)
304 new_x = MULBPP(pTseng, x - 1);
306 new_x = MULBPP(pTseng, x) - 1;
308 pTseng->old_x = x;
309 pTseng->old_y = y;
313 SET_X_YRAW(TsengPtr pTseng, int x, int y)
317 if (pTseng->ChipType == ET4000)
318 new_x = MULBPP(pTseng, x - 1);
320 new_x = MULBPP(pTseng, x) - 1;
322 pTseng->old_x = x;
323 pTseng->old_y = y - 1; /* old_y is invalid (raw transfer) */
337 SET_XY_4(TsengPtr pTseng, int x, int y)
341 if ((pTseng->old_y != y) || (pTseng->old_x != x)) {
342 new_xy = ((y - 1) << 16) + MULBPP(pTseng, x - 1);
344 pTseng->old_x = x;
345 pTseng->old_y = y;
350 SET_XY_6(TsengPtr pTseng, int x, int y)
354 if ((pTseng->old_y != y) || (pTseng->old_x != x)) {
355 new_xy = ((y - 1) << 16) + MULBPP(pTseng, x) - 1;
357 pTseng->old_x = x;
358 pTseng->old_y = y;
364 SET_XY_RAW(TsengPtr pTseng,int x, int y)
367 pTseng->old_x = pTseng->old_y = -1; /* invalidate old_x/old_y (raw transfers) */
371 PINGPONG(TsengPtr pTseng)
373 if (pTseng->tsengFg == 0) {
374 pTseng->tsengFg = 8;
375 pTseng->tsengBg = 24;
376 pTseng->tsengPat = 40;
378 pTseng->tsengFg = 0;
379 pTseng->tsengBg = 16;
380 pTseng->tsengPat = 32;
391 wait_acl_queue(TsengPtr pTseng)
393 if (pTseng->UsePCIRetry)
395 if (pTseng->need_wait_acl)