Lines Matching refs:writeDacMask
205 hwp->writeDacMask(hwp, temp | 0x10);
214 hwp->writeDacMask(hwp, 0x00);
215 hwp->writeDacMask(hwp, 0x00);
225 hwp->writeDacMask(hwp, temp);
229 hwp->writeDacMask(hwp, readDacMask);
291 hwp->writeDacMask(hwp, Regs->Command | 0x10);
300 hwp->writeDacMask(hwp, 0x03);
301 hwp->writeDacMask(hwp, 0x00);
318 hwp->writeDacMask(hwp, 0x24);
319 hwp->writeDacMask(hwp, 0x00);
330 hwp->writeDacMask(hwp, Regs->Command);
333 hwp->writeDacMask(hwp, readDacMask);
365 hwp->writeDacMask(hwp, temp | 0x10);
374 hwp->writeDacMask(hwp, 0x03);
375 hwp->writeDacMask(hwp, 0x00);
377 hwp->writeDacMask(hwp, Regs->Pixel); /* pixel mode */
378 hwp->writeDacMask(hwp, Regs->Pixel); /* also secondary */
379 hwp->writeDacMask(hwp, Regs->Timing); /* pipeline timing */
390 hwp->writeDacMask(hwp, 0x26);
391 hwp->writeDacMask(hwp, 0x00);
393 hwp->writeDacMask(hwp, Regs->PLL & 0xFF);
394 hwp->writeDacMask(hwp, Regs->PLL >> 8);
402 hwp->writeDacMask(hwp, Regs->Command);
406 hwp->writeDacMask(hwp, readDacMask);
598 hwp->writeDacMask(hwp, Regs->Aux | 0x80);
612 hwp->writeDacMask(hwp, Regs->Aux & ~0x80);
636 hwp->writeDacMask(hwp, Regs->Control);
637 hwp->writeDacMask(hwp, Regs->Aux | 0x80); /* enable PLL RAM mode as well */
651 hwp->writeDacMask(hwp, Regs->Aux & ~0x80);
780 /* hwp->writeDacMask(hwp, 0xFF); */